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power driver for stepper motors integrated circuits trinamic motion c ontrol gmbh & co. kg hamburg, germany TMC5072 data sheet b lock d iagram f eatures and b enefits two 2 - phase step per motors drive capability up to 2x 1.1a coil current (2x 1.5a peak) parallel option for one motor at 2.2a (3a peak) motion controller with sixpoint ? ramp voltage range 4.75 2 6 v dc spi & single wire uart dual encoder interface and 2x ref. - switch input per axis highest resolution up to 256 microsteps per full step stealthchop? for extremely quiet operation and smooth motion spreadcycle? highly dynamic motor control chopper dcstep? load dependent speed control stallguard 2? high precision sensorless motor load detection coolstep? current control for energy savings up to 75% passive breaking and freewheeling mode full protection & diagnostics compact size 7x7mm 2 qfn48 package a pplications cctv, security office automation antenna positioning heliostat controller battery powered applications atm, cash recycler , pos lab automation liquid handling medical printer and scanner pumps and valves d escription the tmc5 072 is a dual high performance stepper motor controller and driver ic with serial communication interfaces. it combines flexible ramp generator s for automatic target positioning with industries most advanced stepper motor . dual controller/ driver for up to two 2 - phas e bipolar stepper motors . no - noise stepper operation. integrated motion controller and encoder counter . spi, uart (single wire) and step/dir. m o t i o n c o n t r o l l e r w i t h l i n e a r 6 p o i n t r a m p g e n e r a t o r m o t i o n c o n t r o l l e r w i t h l i n e a r 6 p o i n t r a m p g e n e r a t o r d r i v e r 1 d r i v e r 2 t m c 5 0 7 2 p r o t e c t i o n & d i a g n o s t i c s p r o g r a m m a b l e 2 5 6 s t e p s e q u e n c e r p r o g r a m m a b l e 2 5 6 s t e p s e q u e n c e r p r o t e c t i o n & d i a g n o s t i c s e n c o d e r u n i t a b n e n c o d e r i n p u t 2 x r e f . s w i t c h e s 2 x r e f . s w i t c h e s s p i u a r t s t a l l g u a r d 2 c o o l s t e p d c s t e p p o w e r s u p p l y c h a r g e p u m p s t e p / d i r s t e p / d i r e n c o d e r u n i t a b n e n c o d e r i n p u t m o t o r 1 m o t o r 2
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 2 www.trinamic.com layout for evaluation application examples: high flexibility C multipurpose use the tmc5 07 2 score s with power density , complete motion controlling features and integrated power stages . it offers a versatility that covers a wide spectrum of applications from battery systems up to embedded applications with 1 . 5 a motor current per coil . the small form factor keep s costs down and allow s for miniaturized layouts . extensive support at the chip, board, and software levels enables r apid design cycles and fast time - to - market with competitive products. high energy efficiency and reliability d eliver cost savings in related systems such as power supplies and cooling. o rder c odes order code d escription size [ mm 2 ] tmc 507 2 - la dual axis stealthchop controller/driver, qf n - 48 7 x 7 tmc5 07 2 - eval e valuation board for tmc5 07 2 85 x 55 startrampe baseboard for TMC5072 - eval and further evaluation boards 85 x 55 eselsbrcke connector board for plug - i n evaluation board system 61 x 38 TMC5072 - eval e valuation b oard e valuation & development platform the TMC5072 - eval is part of trinamics universal evaluation board system which provides a convenient handling of the hardware as well as a user - friendly software tool for evaluation. the tmc5 072 evaluation board system consists of three parts: startrampe (base board), eselsbrcke ( connector board including several test points), and tmc5 072 - eval. the stepper motor driver outputs are switched in parallel. a dual abn encoder interface and two reference switch inputs are used. a n application for up to 51 0 stepper motors is shown. the uart single wire diffe - rential interface allows for a decentralized distri buted system with a mini mized number of compo nents. additio nally, an abn encoder and up to two reference swit ches can be used for each motor. a single cpu can control the whole system. the cpu - board and controller / driver boards are highly economi - cal and space saving. c p u t m c 5 0 7 2 h i g h - l e v e l i n t e r f a c e s p i c p u h i g h - l e v e l i n t e r f a c e t m c 5 0 7 2 t m c 5 0 7 2 u p t o 2 5 5 t m c 5 0 7 2 c a n b e a d d r e s s e d . u a r t m i n i a t u r i z e d d e s i g n f o r o n e s t e p p e r m o t o r c o m p a c t d e s i g n f o r u p t o 5 1 0 s t e p p e r m o t o r s m e n c o d e r r e f . s w i t c h e s m o t o r 1 m o t o r 2 m m m o t o r 3 m o t o r 4 m m
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 3 www.trinamic.com t able of c ontents 1 principles of operat ion 5 1.1 k ey c oncepts 5 1.2 c ontrol i nterfaces 6 1.3 s oftware 6 1.4 m oving and c ontrolling the m otor 7 1.5 stealth c hop d river with p rogrammable m icrostepping w ave 7 1.6 stall g uard 2 C m echanical l oad s ensing 7 1.7 cool s tep C l oad a daptive c urrent c ontrol 8 1.8 dc s te p C l oad d ependent s peed c ontrol 8 1.9 e ncoder i nterfaces 8 2 pin assignments 9 2.1 p ackage o utline 9 2.2 s ignal d escriptions 9 3 sample circuits 12 3.1 s tandard a pplication c ircuit 12 3.2 5 v o nly s upply 13 3.3 o ne m otor with h igh c urrent 14 3.4 e xternal 5v p ower s upply 14 3.5 o ptimizing a nalog p recision 16 3.6 d river p rotection and eme c ircuitry 16 4 spi interface 18 4.1 spi d atagram s tructure 18 4.2 spi s ignals 19 4.3 t iming 20 5 uart single wire int erface 21 5.1 d atagram s tructure 21 5.2 crc c alculation 23 5.3 uart s ignals 23 5.4 a ddressing m ultiple s laves 24 5.5 r ing m ode 26 6 register mapping 27 6.1 g eneral c onfiguration r egisters 28 6.2 r amp g enerato r r egisters 31 6.3 e ncoder r egisters 37 6.4 m icrostep t able r egisters 39 6.5 m otor d river r egisters 41 6.6 v oltage pwm mode stealth c hop 46 7 current setting 47 7.1 s ense r esistors 48 8 stealthchop? 49 8.1 t wo m odes for c urrent r egulation 49 8.2 a utomatic s caling 50 8.3 f ixed s caling 52 8.4 c ombining stealth c hop with other c hopper m odes 54 8. 5 f lags in stealth c hop 55 8.6 f reewheeling and p assive m otor b raking 56 9 spreadcycle and clas sic chopper 57 9.1 spread c ycle c hopper 58 9.2 c lassic c onstant o ff t ime c hopper 61 9.3 r andom o ff t ime 62 10 driver diagnostic fl ags 63 10.1 t emperature m easurement 63 10.2 s hort to gnd p rotect ion 63 10.3 o pen l oad d iagnostics 63 11 ramp generator 64 11.1 r eal w orld u nit c onversion 64 11.2 m otion p rofiles 65 11.3 i nterrupt h andling 67 11.4 v elocity t hresholds 67 11.5 r eference s witches 68 12 stallguard2 load mea sureme nt 70 12.1 t uning stall g uard 2 t hreshold sgt 71 12.2 stall g uard 2 u pdate r ate and f ilter 73 12.3 d etectin g a m otor s tall 73 12.4 h oming with stall g uard 73 12.5 l imits of stall g uard 2 o peration 73 13 coolst ep operation 74 13.1 u ser b enefits 74 13.2 s etting up for cool s tep 74 13.3 t uning cool s tep 76 14 dcstep 77 14.1 u ser b enefits 77 14.2 d esigning - i n dc s tep 77 14.3 e nabling dc s tep 78 14.4 s tall detection in dc s tep mode 78 14.5 m easuring a c tual m otor v elocity in dc s tep o peration 79 15 sine - wave look - up table 80 15.1 u ser b enefits 80 15.2 m icrostep t able 80 16 step/dir interface 82 16.1 t iming 82 16.2 c hanging r esolution 83 16.3 micro p lyer s tep i nterpolator and s tand s till d etection 83 17 abn incremental enco der interface 85 17.1 e ncoder t iming 86 17.2 s etting the e ncoder to m atch m otor r esolution 86 17.3 c losing the l oop 86 18 quick configuration guide 88 19 getting started 93
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 4 www.trinamic.com 19.1 i nitialization e xamples 93 20 external reset 95 21 clock oscillator and clock input 95 21.1 u sing the i nternal c lock 95 21.2 u sing an e xternal c lock 95 21.3 c onsiderations on the f requency 96 22 absolute maxim um ratings 97 23 electrical character istics 97 23.1 o perational r ange 97 23.2 dc c haracteristics and t iming c haracteristics 98 23 .3 t hermal c haracteristics 101 24 layout consideration s 102 24.1 e xposed d ie p ad 102 24.2 w iring gnd 102 24.3 s upply f iltering 102 24.4 s ingle d river c onnection 102 24.5 l ayout e xample 103 25 package mechanical d ata 104 25.1 d imensional d rawings 104 25.2 p ackage c odes 104 26 design philosophy 105 27 disclaimer 105 28 esd sensitive device 105 29 table of figures 106 30 revision history 107 31 references 107
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 5 www.trinamic.com 1 principles of operation figure 1 . 1 basic application and block diagram the tmc5 072 motion controller and driver chip is an intelligent power component interfacing between the cpu and one or two stepper motor s . all stepper motor logic is completely within the tmc 5 072 . no software is required to control the motor C just provide target positions. the tmc5 07 2 offers a number of unique enhancements which are enabled by the syst em - on - chip integration of driver and controller. the sixpoint ramp generator of the tmc5 07 2 uses stealthchop, dcstep, coolstep , and stallguard2 automatically to optimize every motor movement . the clear conce pt and the comprehensive solution save design tim e . 1.1 key concepts the tmc507 2 implement s several advanced features which are exclusive to trinamic products. these features contribute toward greater precision, greater energy efficiency, higher reliability, smoother motion, and cooler operation in many ste pper motor applications. stealthchop ? no - noise, high - precision chopper algorithm for inaudible motion and inaudible standstill of the motor. dcstep? load dependent speed control. the motor moves as fast as possible and never loses a step. stallguard2 ? h igh - precision load measurement using the back emf on the motor coils . coolstep ? l oad - adaptive current control which reduces energy consumption by as much as 75% . spreadcycle ? h igh - precision chopper algorithm available as an alternative to the traditional c onstant off - time algorit hm . s ixpoint ? fast and precise positioning using a hardware ramp generator with a set of four acceleration / deceleration settings . quickest response due to dedicated hardware. d i f f . t r a n c e i v e r h a l f b r i d g e 2 h a l f b r i d g e 1 h a l f b r i d g e 1 h a l f b r i d g e 2 + v m v s 2 x c u r r e n t c o m p a r a t o r 2 p h a s e s t e p p e r m o t o r n s s t e p p e r d r i v e r p r o t e c t i o n & d i a g n o s t i c s p r o g r a m m a b l e s i n e t a b l e 4 * 2 5 6 e n t r y 2 x d a c s t a l l g u a r d 2 ? c o o l s t e p ? x s t e p m u l t i p l i e r o 1 a 1 o 1 a 2 b r 1 a / b r s e n s e r s e n s e o 1 b 1 o 1 b 2 s p r e a d c y c l e & s t e a l t h c h o p c h o p p e r v c c _ i o t m c 5 0 7 2 d u a l s t e p p e r m o t o r d r i v e r / c o n t r o l l e r s p i i n t e r f a c e c s n / i o 0 s c k / i o 1 s d o / r i n g s d i / i o 2 2 x l i n e a r 6 p o i n t r a m p g e n e r a t o r r e f e r e n c e s w i t c h p r o c e s s i n g s t e p & d i r e c t i o n p u l s e g e n e r a t i o n r e f l 1 / s t e p 1 s t e p p e r # 1 m o t i o n c o n t r o l c o o l s t e p m o t o r d r i v e r r e f r 1 / d i r 1 h a l f b r i d g e 2 h a l f b r i d g e 1 h a l f b r i d g e 1 h a l f b r i d g e 2 + v m v s 2 x c u r r e n t c o m p a r a t o r 2 p h a s e s t e p p e r m o t o r n s p r o g r a m m a b l e s i n e t a b l e 4 * 2 5 6 e n t r y 2 x d a c s t a l l g u a r d 2 ? c o o l s t e p ? x s t e p m u l t i p l i e r o 2 a 1 o 2 a 2 b r 2 a / b r s e n s e r s e n s e o 2 b 1 o 2 b 2 s p r e a d c y c l e & s t e a l t h c h o p c h o p p e r r e f e r e n c e s w i t c h p r o c e s s i n g s t e p & d i r e c t i o n p u l s e g e n e r a t i o n s t e p p e r # 2 c o o l s t e p m o t o r d r i v e r 2 x l i n e a r 6 p o i n t r a m p g e n e r a t o r m o t i o n c o n t r o l c o n t r o l r e g i s t e r s e t s i n g l e w i r e i n t e r f a c e c l k o s c i l l a t o r / s e l e c t o r 5 v v o l t a g e r e g u l a t o r t e m p e r a t u r e m e a s u r e m e n t c h a r g e p u m p c p o c p i v c p 2 2 n 1 0 0 n s w i o n s w _ s e l c l k _ i n i n t e r f a c e r e f l 2 / s t e p 2 r e f r 2 / d i r 2 s w i o p + v m 5 v o u t v s a 4 . 7 + v i o d u a l e n c o d e r u n i t e n c 1 a e n c 1 b i o 0 / s w i o p / r e f l 1 1 a 1 b 1 n 2 a 2 b 2 n r e f r 1 r e f r 2 i o 1 / s w i o n / r e f l 2 e n c 1 a / i n t e n c 1 b / p p i n t & p o s i t i o n p u l s e o u t p u t n e x t a d d r d r v _ e n n d r v _ e n n s i n g l e d r v s i n g l e d r v d r v 2 : = d r v 1 g n d p g n d p g n d g n d a f f f f f f f f f f = 6 0 n s s p i k e f i l t e r t s t _ m o d e d c s t e p ? d c s t e p ? d i e p a d v c c r s e n s e = 0 r 2 5 a l l o w s f o r m a x i m u m c o i l c u r r e n t s p i ? s i n g l e w i r e u a r t o p t . e x t . c l o c k 1 2 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 1 0 0 n 1 0 0 n 1 0 0 n i n t e r f a c e s e l e c t i o n e n c o d e r o r i n t e r r u p t o u t r e f . / s t o p s w i t c h e s o r s t e p & d i r ( m o t o r 2 ) r e f . / s t o p s w i t c h e s o r s t e p & d i r ( m o t o r 1 ) o p t . d r i v e r e n a b l e
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 6 www.trinamic.com in addition to these performance enhancements, trinamic motor drivers offer safeguards to detect and protect against shorted outputs, output open - circuit, overtemperature, and undervoltage conditions for enhancing safety and recovery from equipment malfunctions. 1.2 control interfac es the tmc5 07 2 supports both, a n spi and a uart based single wire interface with crc checking. selection of the actual interface is done via the configuration pin sw_sel, which can be hardwired to gnd or vcc_io depending on the desired interface. 1.2.1 spi interface the spi interface is a b it - serial interface synchronous to a bus clock. for every bit sent from the bus master to the bus slave another bit is sent simultaneously from the slave to the master. communication betw een an spi master and the tmc5 07 2 slave always consists of sending on e 4 0 - bit command word and receiving one 4 0 - bit status word. the spi command rate typically is a few commands per complete motor motion . 1.2.2 uart interface the single wire interface allows differential operation similar to rs485 (using swiop and swion) or sin gle wire interfacing (leaving open swion). it can be driven by any standard uart. no baud rate configuration is required. a n optional ring mode allows chaining of slaves to optimize interfacing for applications with regularly distributed drives . 1.3 software from a software point of view the tmc507 2 is a peripheral with a number of control and status registers. m ost of them can eith er be written only or read only. s ome of the registers allow both read and write access. in case read - modify - write access is desi red for a write only register, a shadow register can be realized in master software.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 7 www.trinamic.com 1.4 moving and controlling the motor 1.4.1 integrated motion controller the integrated 32 bit motion controller automatically drives the motor to target positions, or accelerates to target velocities. all motion parameters can be changed on the fly. the motion controller recalculates immediately. a minimum set of configuration data consists of acceleration and deceleration values and the maximum motion velocity. a start and stop v elocity is supported as well as a second acceleration and deceleration setting. the integrated motion controller supports immediate reaction to mechanical reference switches and to the sensorless stall detection stallguard2. b enefits are: - flexible ramp pr ogramming - efficient use of motor torque for acceleration and deceleration a llows higher machine throughput - immediate reacti on to stop and stall conditions 1.4.2 step /d ir interface one or both motors can optionally be controlled by a step and direction input. in this case, the respective motion controller remains unused. active edges on the step input can be rising edges o r both rising and falling edges as controlled by another mode bit (dedge). using both edges cuts the toggle rate of the step signal in half, wh ich is useful for communication over slow interfaces such as optically isolated interfaces. on each active edge, the state sampled from the dir input determines whether to step forward or back. each step can be a fullstep or a microstep, in which there are 2, 4, 8, 16, 32, 64, 128, or 256 microsteps per fullstep. during microstepping, a step impulse with a low state on dir increases the microstep counter and a high decreases the counter by an amount controlled by the microstep resolution. an internal table translates the counter value into the sine and cosine values which control the motor current for microstepping. 1.5 stealthchop driver with programmable microstepping wave current into the motor coils is controlled using a cycle - by - cycle chopper mode. up to t hree chopper modes are available: a traditional constant off - time mode and the spreadcycle mode as well as the unique stealthchop. the constant off - time mode provides higher torque at highest velocity, while spreadcycle mode offers smoother operation and g reater power efficiency over a wide range of speed and load. the spreadcycle chopper scheme automatically integrates a fast decay cycle and guarantees smooth zero crossing performance. in contrast to the other chopper modes, stealthchop is a voltage choppe r based principle. it guarantees that the motor is absolutely quiet in standstill and in slow motion, except for noise generated by ball bearings. the extremely smooth motion is beneficial for many applications. programmable microstep shapes allow optimizi ng the motor performance. benefits of using stealthchop: - significantly improved microstepping with low cost motors - motor runs smooth and quiet - absolutely no standby noise - reduced mechanical resonances yields improved torque 1.6 stallguard 2 C mechanical load sensing stallguard2 provides an accurate measurement of the load on the motor. it can be used for stall detection as well as other uses at loads below those which stall the motor, such as coolstep load - adaptive current reduction. this gives more informatio n on the drive allowing functions like sensorless homing and diagnostics of the drive mechanics.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 8 www.trinamic.com 1.7 coolstep C load adaptive current control coolstep drives the motor at the optimum current. it uses the stallguard2 load measurement information to adjust the motor current to the minimum amount required in the actual load situation. this saves energy and keeps the components cool. benefits are: - energy efficiency power consumption decreased up to 75% - motor generates less heat improved mechanical precision - less or no cooling improved reliability - use of smaller motor less torque reserve required cheaper motor does the job figure 1 . 2 shows the efficiency gain of a 42mm stepper motor when using coolstep compared to standa rd operation with 50% of torque reserve. coolstep is enabled above 60rpm in the example. figure 1 . 2 energy efficiency with coolstep (example) 1.8 dcstep C load dependent speed contro l dcstep allows the motor to run near its load limit and at its velocity limit without losing a step. if the mechanical load on the motor increases to the stalling load, the motor automatically decreases velocity so that it can still drive the load. with t his feature, the motor will never stall. in addition to the increased torque at a lower velocity, dynamic inertia w ill allow the motor to overcome mechanical overloads by decelerating. dcstep directly integrates with the ramp generator, so that the target position will be reached, even if the motor velocity needs to be decreased due to inc reased mechanical load. a dynamic range of up to factor 10 or more can be covered by dcstep without any step loss. by optimizing the motion velocity in high load situation s, this feature further enhances overall system efficiency. benefits are: - motor does not loose steps in overload conditions - application works as fast as possible - highest possible acceleration automatically - highest energy efficiency at speed limit - highest possible motor torque using fullstep drive - cheaper motor does the job 1.9 encoder interfaces the TMC5072 provides two encoder interfaces for external incremental encoders. the encoders can be used for homing of the motion controllers (alternatively to referen ce switches) and for consistency checks on - the - fly between encoder position and ramp generator position. a programmable prescaler allows the adaptation of the encoder resolution to the motor resolution. 32 bit encoder counters are provided. 0 0 , 1 0 , 2 0 , 3 0 , 4 0 , 5 0 , 6 0 , 7 0 , 8 0 , 9 0 5 0 1 0 0 1 5 0 2 0 0 2 5 0 3 0 0 3 5 0 e f f i c i e n c y v e l o c i t y [ r p m ] e f f i c i e n c y w i t h c o o l s t e p e f f i c i e n c y w i t h 5 0 % t o r q u e r e s e r v e
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 9 www.trinamic.com 2 pin assignmen ts 2.1 package outline figure 2 . 1 tmc5 07 2 pin assignments. 2.2 signal descriptions pin number type function gnd 6, 34 gnd digital ground pin for io pins and digital circuitry. vcc_io 7 3.3v or 5v i/o supply voltage pin for all digital pins. vsa 30 analog supply voltage for 5v regulator C typically supplied with driver supply voltage. an additional 100nf capacitor to gnd (gnd plane) is recommended for best performance . gnda 31 gnd analog gnd . tie to gnd plane. 5vout 32 output of internal 5v regulator. attach 2.2 f or larger ceramic capacitor to gnda near to pin for best performance. may be used to supply vcc of chip. b . d w e r s t e g , t r i n a m i c 2 0 1 2 t m c 5 0 7 2 - l a q f n 4 8 7 m m x 7 m m 0 . 5 p i t c h r e f l 1 c p o g n d p t s t _ m o d e o 1 a 1 v s o 1 b 1 b r 1 a o 1 a 2 v s o 1 b 2 v c c _ i o e n c 1 b / p p o 2 a 2 b r 2 a b r 2 b v s o 2 b 2 v s o 2 b 1 1 e n c 1 a / i n t s d o / r i n g s w i o p g n d s d i / i o 2 s c k / i o 1 c s n / i o 0 r e f r 1 r e f l 2 v s a g n d a g n d c p i c l k s w i o n g n d p r e f r 2 b r 1 b o 2 a 1 2 3 4 5 6 7 8 9 1 0 1 1 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 3 9 3 8 d r v _ e n n v c p 3 7 2 5 - 1 3 1 2 - s w s e l - v c c n e x t a d d r 5 v o u t
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 10 www.trinamic.com pin number type function vcc 33 5v supply input for digital circuitry within chip and charge pump. attach 470nf capacitor to gnd (gnd plane). may be supplied by 5vout. a 2 .2? resistor is recommended for decoupling noise from 5vout. when using an external supply, make sure, that vcc comes up before or in parallel to 5vout or vcc_io, whichever comes up later! die_pad - gnd connect the exposed die pad to a gnd plane. provide as many as possible vias for heat transfer to gnd plane. t able 2 . 1 low voltage digital and analog power supply pins pin number type function cpo 35 o(vcc) charge pump driver output. outputs 5v (gnd to vcc) square wave with 1/16 of internal oscillator frequency. cpi 36 i(vcp) charge pump capacitor input: provide external 22nf or 33nf / 50 v capacitor to cpo. vcp 37 output of charge pump. provide external 100nf capacitor to vs. t able 2 . 2 charge pump pins pin number type function enc1a/int 1 i/o input a for incremental encoder 1. can be pro grammed to provide interrupt output based on ramp generator flags ramp_stat bits 4, 5, 6 & 7 and encoder null event status enc_status bit 0 ( poscmp_enable =1 ). enc1b/pp 2 i/o input b for incremental encoder 1. can be programmed to provide position compare output for motor 1 ( poscmp_enable =1 ). csn/io0 3 i/o chip select input of spi interface, programmable io in uart mode sck/io1 4 i/o serial clock input of spi interface, programmable io in uart mode sdi/io2 5 i/o data input of spi interface, programmable io in uart mode sdo/ ring 8 i/o data output of spi interface (tristate, enabled with csn=0), mode c onfiguration input in uart mode (0 = normal mode, 1 = single wire ring mode C swio_p is input, swio_n is output ) swiop 9 i/o s ingle wire i/o (positive) . ser ial input in ring mode. multi - purpose input in spi mode or encoder 1 n input. swion 10 i/o single wire i/o (negative) for differential mode. leave open in non - differential mode when operating at 5v io voltage or tie to desired threshold voltage . serial ou tput in ring mode. multi - purpose input in spi mode or encoder 2 n input. clk 11 i clock input . tie to gnd using short wire for internal clock or supply external clock . the first high signal disables the internal oscillator until power down. swsel 12 i in terface selection input. tie to gnd for spi mode, tie to vcc_io for single wire (uart) interface mode. nextaddr 24 i address increment (if tied high) for single wire (uart) mode. general purpose input in spi mode refr2/dir2 25 i right reference switch in put for motor 2, optional dir input for step/dir operation of motor 2 or encoder 2 b input refl2/step2 26 i left reference switch input for motor 2, optional step input for step / dir operation of motor 2 refr1/dir1 27 i right reference switch input for mo tor 1, optional dir input for step / dir operation of motor 1 or encoder 2 a input refl1/step1 28 i left reference switch input for motor 1, optional step input for step / dir operation of motor 1 drv_enn 29 i enable i nput for motor drivers. the power stage becomes switched off (all motor outputs floating) when this pin becomes driven to a high level . tie to gnd for normal operation. tst_mode 48 i test mode input. tie to gnd using short wire.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 11 www.trinamic.com pin number type function - 13, 23, 38 n.c. unused pins C no internal electrical connection . leave open or tie to gnd for compatibility with future devices. t able 2 . 3 digital i/o pins (all related to vcc_io supply) pin number type function o2a1 14 o (vs) motor 2 coil a output 1 br2a 15 sense r esistor connection for m otor 2 coil a . place sense resistor to gnd near pin . o2a2 16 o (vs) motor 2 coil a output 2 vs 17, 19 motor supply voltage. provide filtering capacity near pin with shortest loop to nearest gndp pin (respectively via gnd plane). gndp 18 gnd power gnd. connect to gnd plane near pin. o2b1 20 o (vs) motor 2 coil b output 1 br2b 21 sense resistor connection for m otor 2 coil b. place sense resistor to gnd near pin . o2b2 22 o (vs) motor 2 coil b output 2 o1b2 39 o (vs) motor 1 coi l b output 2 br1b 40 sense resistor connection for m otor 1 coil b. place sense resistor to gnd near pin . o1b1 41 o (vs) motor 1 coil b output 1 vs 42, 44 motor supply voltage. provide filtering capacity near pin with shortest loop to nearest gndp pin (respectively via gnd plane). gndp 43 gnd power gnd. connect to gnd plane near pin. o1a2 45 o (vs) motor 1 coil a output 2 br1a 46 sense resistor connection for m otor 1 coil a . place sense resistor to gnd near pin . o1a1 47 o (vs) motor 1 coil a output 1 t able 2 . 4 power driver pins
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 12 www.trinamic.com 3 sample circuits the sample circuits show the connection of the external components in different operation and supply modes. the connection of the bus interface and further dig ital signals is left out for clarity. 3.1 standard application circuit figure 3 . 1 standard application circuit the standard application circuit uses a minimum set of additional compo nents in order to operate the motor. use low esr capacitors for filtering the power supply which are capable to cope with the current ripple. the current ripple often depends on the power supply and cable length. the vcc_io voltage can be supplied from 5vo ut, or from an external source, e.g. a low drop 3.3v regulator. in order to minimize linear voltage regulator power dissipation of the internal 5v voltage regulator in applications where vm is high, a different (lower) supply voltage can be used for vsa, i f available. for example, many applications provide a 12v supply in addition to a higher supply voltage like 24v. using the 12v supply for vsa will reduce the power dissipation of the internal 5v regulator to about 37% of the dissipation caused by supply w ith the full motor voltage. for best motor chopper performance, an optional r/c - filter de - couples 5vout from digital noise cause by power drawn from vcc. basic layout hints place sense resistors and all filter capacitors as close as possible to the relate d ic pins. use a solid common gnd for all gnd connections, also for sense resistor gnd. connect 5vout filtering capacitor directly to 5vout and gnda pin. see layout hints for more details. low esr electrolytic capacitors are recommended for vs filtering. attention in case vsa is supplied by a different voltage source, make sure that vsa does not exceed vs by more than one diode drop upon power up or power down. v c c _ i o t m c 5 0 7 2 s p i i n t e r f a c e c s n / i o 0 s c k / i o 1 s d o / r i n g s d i / i o 2 r e f e r e n c e s w i t c h p r o c e s s i n g r e f l 1 / s t e p 1 r e f r 1 / d i r 1 r e f e r e n c e s w i t c h p r o c e s s i n g c o n t r o l l e r 2 s i n g l e w i r e i n t e r f a c e 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p v c p 2 2 n 1 0 0 n s w i o n s w _ s e l c l k _ i n r e f l 2 / s t e p 2 r e f r 2 / d i r 2 s w i o p + v m 5 v o u t v s a 4 . 7 + v i o e n c 1 a / i n t e n c 1 b / p p i n t & p o s i t i o n p u l s e o u t p u t n e x t a d d r d r v _ e n n d r v _ e n n g n d p g n d g n d a t s t _ m o d e d i e p a d v c c o p t . e x t . c l o c k 1 2 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 1 0 0 n c o n t r o l l e r 1 f u l l b r i d g e a f u l l b r i d g e b + v m v s s t e p p e r m o t o r # 1 n s o 1 a 1 o 1 a 2 b r 1 a o 1 b 1 o 1 b 2 d r i v e r 1 1 0 0 n b r 1 b f u l l b r i d g e a f u l l b r i d g e b s t e p p e r m o t o r # 2 n s o 2 a 1 o 2 a 2 b r 2 a o 2 b 1 o 2 b 2 d r i v e r 2 b r 2 b v s 1 0 0 n + v m 1 0 0 f c p i c p o + v i o o p t i o n a l u s e l o w e r v o l t a g e d o w n t o 6 v 2 r 2 4 7 0 n r 1 a r 1 b r 2 a r 2 b
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 13 www.trinamic.com 3.2 5 v only supply f igure 3 . 2 5v only operation while the standard application circuit is limited to roughly 5.5 v lower supply voltage, a 5 v only application lets the ic run from a normal 5 v +/ - 5 % supply. in this application, linear regulator drop must be minimized. therefore, the major 5 v load is removed by supplying vcc directly from the external supply. in order to keep supply ripple away from the analog voltage reference, 5vout should have an own filtering capacity and the 5vout pin does not become bridged to the 5v supply. v c c _ i o t m c 5 0 7 2 s p i i n t e r f a c e c s n / i o 0 s c k / i o 1 s d o / r i n g s d i / i o 2 r e f e r e n c e s w i t c h p r o c e s s i n g r e f l 1 / s t e p 1 r e f r 1 / d i r 1 r e f e r e n c e s w i t c h p r o c e s s i n g c o n t r o l l e r 2 s i n g l e w i r e i n t e r f a c e 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p v c p 2 2 n 1 0 0 n s w i o n s w _ s e l c l k _ i n r e f l 2 / s t e p 2 r e f r 2 / d i r 2 s w i o p + 5 v 5 v o u t v s a 4 . 7 + v i o e n c 1 a / i n t e n c 1 b / p p i n t & p o s i t i o n p u l s e o u t p u t n e x t a d d r d r v _ e n n d r v _ e n n g n d p g n d g n d a t s t _ m o d e d i e p a d v c c o p t . e x t . c l o c k 1 2 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 4 7 0 n c o n t r o l l e r 1 f u l l b r i d g e a f u l l b r i d g e b + 5 v v s s t e p p e r m o t o r # 1 n s o 1 a 1 o 1 a 2 b r 1 a r s 1 b o 1 b 1 o 1 b 2 d r i v e r 1 1 0 0 n b r 1 b r s 1 a f u l l b r i d g e a f u l l b r i d g e b s t e p p e r m o t o r # 2 n s o 2 a 1 o 2 a 2 b r 2 a r s 2 b o 2 b 1 o 2 b 2 d r i v e r 2 b r 2 b r s 2 a v s 1 0 0 n + 5 v 1 0 0 f c p i c p o + v i o
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 14 www.trinamic.com 3.3 o ne motor with high current the tmc5 07 2 supports double motor current for a single driver by paralleling both power stages. in order to operate in this mod e, activate the flag single_driver in the global configuration register gconf . this register can be locked for subsequent write access. f igure 3 . 3 driving a single motor with hig h current 3.4 external 5v power supply when an external 5v power supply is available, the power dissipation caused by the internal linear regulator can be eliminated. this especially is beneficial in high voltage applications, and when thermal conditions are critical. there are two options for using this external 5v source: either the external 5v source is used to support the digital supply of the driver by supplying the vcc pin , or the complete internal voltage regulator becomes bridged and is replaced by the external supply voltage. 3.4.1 support for the vcc supply this scheme uses an external supply for all digital circuitry within the driver ( figure 3 . 4 ). as the digital circuitry makes up for most of the power dissipation, this way the internal 5v regulator sees only low remaining load. the precisely regulated voltage of the internal regulator is still used as the reference for the motor current regulation as well as for supplying internal analog circuitry. when cutting pin vcc from 5vo ut, make sure that the vcc supply comes up before or synchronously with the 5vout supply to ensure a correct power up reset of the internal logic. a simple schematic uses t wo diodes forming an or of the internal and the external po wer supplies for vcc. in order to prevent the chip from drawing part of the power from its internal regulator, a low drop 1a schottky diode is used for the external 5v supply path , while a silicon diode is used for the 5vout path . an enhanced solution uses a dual pnp transistor as an active switch. it minimizes voltage drop and thus gives best performance . in certain setups, switching of vcc voltage can be eliminated. a third variant uses the vcc_io supply to ensure power - on reset . this is possible, if vcc_ io c om es up synchronously with or delayed to vcc. use a linear regulator to generate a 3.3v vcc_io from the external 5v vcc source. th is 3.3v regulator v c c _ i o t m c 5 0 7 2 s p i i n t e r f a c e c s n / i o 0 s c k / i o 1 s d o / r i n g s d i / i o 2 r e f e r e n c e s w i t c h p r o c e s s i n g r e f l 1 / s t e p 1 r e f r 1 / d i r 1 r e f e r e n c e s w i t c h p r o c e s s i n g c o n t r o l l e r 2 s i n g l e w i r e i n t e r f a c e 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p v c p 2 2 n 1 0 0 n s w i o n s w _ s e l c l k _ i n r e f l 2 / s t e p 2 r e f r 2 / d i r 2 s w i o p + v m 5 v o u t v s a 4 . 7 + v i o e n c 1 a / i n t e n c 1 b / p p i n t & p o s i t i o n p u l s e o u t p u t n e x t a d d r d r v _ e n n d r v _ e n n g n d p g n d g n d a t s t _ m o d e d i e p a d v c c o p t . e x t . c l o c k 1 2 - 1 6 m h z 3 . 3 v o r 5 v i / o v o l t a g e 1 0 0 n 1 0 0 n c o n t r o l l e r 1 f u l l b r i d g e a f u l l b r i d g e b + v m v s h i g h c u r r e n t s t e p p e r m o t o r n s o 1 a 1 o 1 a 2 b r 1 a r s 1 b o 1 b 1 o 1 b 2 d r i v e r 1 1 0 0 n b r 1 b r s 1 a f u l l b r i d g e a f u l l b r i d g e b o 2 a 1 o 2 a 2 b r 2 a o 2 b 1 o 2 b 2 d r i v e r 2 b r 2 b v s 1 0 0 n + v m 1 0 0 f c p i c p o + v i o
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 15 www.trinamic.com will cause a certain vol tage drop. a voltage drop in the regulator of 0.9v or more (e.g. ld 1117 - 3.3) ens ures that the 5v supply already has exceeded the lower limit of about 3. 0 v once the reset conditions ends . the reset condition ends earliest, when vcc_io exceeds the undervoltage limit of minimum 2.1v . make sure that the power - down sequence also is safe . u ndefined states can result when vcc drops well below 4v without safely triggering a reset condition. triggering a reset upon power - down can be ensured when vsa goes down synchronously with or before vcc . figure 3 . 4 using an external 5v supply for digital circuitry of driver (different options) 3.4.2 internal regulator bridged in case a clean external 5v supply is available, it can be used for compl ete supply of analog and digital part ( figure 3 . 5 ). the circuit will benefit from a well regulated supply, e.g. when using a +/ - 1% regulator. a precise supply guarantees increased motor current precision, because the voltage at 5v out directly is the reference voltage for all internal units of the driver, especially for motor current control. for best performance, the power supply should have low ripple to give a precise and stable supply at 5vout pin with remaining ripple well belo w 5mv. some switching regulators have a higher remaining ripple, or different loads on the supply may cause lower frequency ripple. in this case, increase capacity attached to 5vout. in case the external supply voltage has poor stability or low frequency r ipple, this would affect the precision of the motor current regulation as well as add chopper noise. figure 3 . 5 using an external 5v supply to bypass internal regulator 5 v v o l t a g e r e g u l a t o r 5 v o u t v s a 4 . 7 v c c 1 0 0 n 4 7 0 n + 5 v l l 4 4 4 8 m s s 1 p 3 + v m 5 v v o l t a g e r e g u l a t o r 5 v o u t v s a 4 . 7 v c c 1 0 0 n + 5 v + v m v c c _ i o 4 7 0 n 1 0 0 n 3 . 3 v r e g u l a t o r 3 . 3 v v c c s u p p l i e d f r o m e x t e r n a l 5 v . 5 v o r 3 . 3 v i o v o l t a g e . v c c s u p p l i e d f r o m e x t e r n a l 5 v . 3 . 3 v i o v o l t a g e g e n e r a t e d f r o m s a m e s o u r c e . 5 v v o l t a g e r e g u l a t o r 5 v o u t v s a 4 . 7 v c c 1 0 0 n 4 7 0 n + 5 v b a t 5 4 + v m v c c s u p p l i e d f r o m e x t e r n a l 5 v u s i n g a c t i v e s w i t c h . 5 v o r 3 . 3 v i o v o l t a g e . 4 k 7 1 0 k 2 x b c 8 5 7 o r 1 x b c 8 5 7 b s 5 v v o l t a g e r e g u l a t o r + 5 v 5 v o u t v s a 4 . 7 v c c 4 7 0 n 1 0 r w e l l - r e g u l a t e d , s t a b l e s u p p l y , b e t t e r t h a n + - 5 %
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 16 www.trinamic.com 3.5 optimizi ng analog precision the 5vout pin is used as an analog reference for operation of the tmc5 07 2. performance will degrade when there is voltage ripple on this pin. most of the high frequency ripple in a tmc5 07 2 design results from the operation of the intern al digital log ic. the digital logic switches wit h each edge of the clock signal. further, ripple results from operation of the charge pump, which operates with roughly 1 mhz and draws current from the vcc pin. in order to keep this ripple as low as possibl e, an additional filtering capacitor can be put directly next to the vcc pin with vias to the gnd plane giving a short connection to the digital gnd pins (pin 6 and pin 34). analog performance is best, when this ripple is kept away from the analog supply p in 5vout, using an additional series resistor of 2.2 ? . the voltage drop on this resistor will be roughly 100 mv (i vcc * r). f igure 3 . 6 rc - filter on vcc for reduced ripple 3.6 driver protection and eme circuitry some applications have to cope with esd events caused by motor operation or external influence. despite esd circuitry within the driver chips, esd events occurring during operation can cause a reset or even a destruction of the motor driver, depending on their energy. especiall y plastic housings and belt drive systems tend to cause esd events. it is best practice to avoid esd events by attaching all conductive parts, especially the motors themselves to pcb ground, or to apply electrically conductive plastic parts. in addition, t he driver can be protected up to a certain degree against esd events or live plugging / pulling the motor, which also causes high voltages and high currents into the motor connector terminals. a simple scheme uses capacitors at the driver outputs to reduce the dv/dt caused by esd events. larger capacitors will bring more benefit concerning esd suppression, but cause additional current flow in each chopper cycle, and thus increase driver power dissipation, especially at high supply voltages. the values shown are example values C they might be varied between 100pf and 1nf. the capacitors also dampen high frequency noise injected from digital parts of the circuit and thus reduce electromagnetic emission. a more elaborate scheme uses lc fil ters to de - couple the driver outputs from the motor connector. varistors in between of the coil terminals eliminate coil overvoltage caused by live plugging. optionally protect all outputs by a varistor against esd voltage . 5 v v o l t a g e r e g u l a t o r c h a r g e p u m p v c p 2 2 n 1 0 0 n + v m 5 v o u t v s a 4 . 7 v c c 1 0 0 n 4 7 0 n c p i c p o g n d a 2 r 2
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 17 www.trinamic.com figure 3 . 7 simple esd enhancement and m ore elaborate motor output protection f u l l b r i d g e a f u l l b r i d g e b s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v f u l l b r i d g e a f u l l b r i d g e b s t e p p e r m o t o r n s o a 1 o a 2 o b 1 o b 2 d r i v e r 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v 5 0 o h m @ 1 0 0 m h z 5 0 o h m @ 1 0 0 m h z 5 0 o h m @ 1 0 0 m h z 5 0 o h m @ 1 0 0 m h z v 1 v 2 f i t v a r i s t o r s t o s u p p l y v o l t a g e r a t i n g . s m d i n d u c t i v i t i e s c o n d u c t f u l l m o t o r c o i l c u r r e n t . 4 7 0 p f 1 0 0 v 4 7 0 p f 1 0 0 v v a r i s t o r s v 1 a n d v 2 p r o t e c t a g a i n s t i n d u c t i v e m o t o r c o i l o v e r v o l t a g e . v 1 a , v 1 b , v 2 a , v 2 b : o p t i o n a l p o s i t i o n f o r v a r i s t o r s i n c a s e o f h e a v y e s d e v e n t s . b r b r s a b r a 1 0 0 n f 1 6 v r s b 1 0 0 n f 1 6 v v 1 a v 1 b v 2 a v 2 b
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 18 www.trinamic.com 4 spi interface 4.1 spi datagram structure the tmc5 07 2 uses 40 bit spi ? (serial peripheral interface, spi is trademark of motorola) datagrams for communication with a microcontroller. microcontrollers which are equipped w ith hardware spi are typically able to communicate using integer multiples of 8 bit. the ncs line of the tmc5 07 2 must be handled in a way, that it stays active (low) for the complete duration of the datagram transmission. each datagram sent to the device is composed of an address byte followed by four data bytes. this allows direct 32 bit data word communication with the register set. each register is accessed via 32 data bits even if it uses less than 32 data bits. for simplification, each register is s pecified by a one byte address: - for a read access the most significant bit of the address byte is 0 . - for a write access the most signific ant bit of the address byte is 1 . most registers are write only registers, some can be read additionally, and there are also some read only registers. 4.1.1 selection of write / read (write_notread) the read and write selection is controlled by the msb of the address byte (bit 39 of the spi datagram). this bit is 0 for read access and 1 for write access. so, the bit named w is a write_notread control bit. the active high write bit is the msb of the address byte. so, 0x80 has to be added to the address for a write access. the spi interface always delivers data back to the master, independent of the w bit. the data transferre d back is the data read from the address which was transmitted with the previous datagram, if the previous access was a read access. if the previous access was a write access, then the data read back mirrors the previously received write data. so, the diff erence between a read and a write access is that the read access does not transfer data to the addressed register but it transfers the address only and its 32 data bits are dummies, and, further the following read or write access delivers back the data rea d from the address transmitted in the preceding read cycle. a read access request datagram uses dummy write data. read data is transferred back to the master with the subsequent read or write access. hence, reading multiple registers can be done in a pipe lined fashion . whenever data is read from or written to the tmc5 07 2, the msbs delivered back contain the spi status, spi_status , a number of eight selected status bits. spi d atagram s tructure msb (transmitted first) 40 bit lsb (transmitted last) 39 ... ... 0 ? 8 bit address ? 8 bit spi status ? ? 32 bit data 39 ... 32 31 ... 0 ? to tmc507 2: rw + 7 bit address ? from tmc5 07 2: 8 bi t spi status 8 bit data 8 bit data 8 bit data 8 bit data 39 / 38 ... 32 31 ... 24 23 ... 16 15 ... 8 7 ... 0 w 38...32 31...28 27...24 23...20 19...16 15...12 11...8 7...4 3...0 3 9 3 8 3 7 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 0 9 8 7 6 5 4 3 2 1 0
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 19 www.trinamic.com example : for a read access to the register ( x actual ) with the address 0x2 1, the a ddr ess byte has to be set to 0x2 1 in the access preceding the read access. for a write access to the register ( v actual ), the address byte has to be set to 0x80 + 0x22 = 0xa2. for read access, the data bit might have any value ( - ). so, one can set them to 0 . action data sent to tmc5 07 2 data received from tmc5 07 2 read x actual ? 0x2100000000 ? 0xss & unused data read x actual ? 0x2100000000 ? 0xss & x actual write v max := 0x00abcdef ? 0xa 7 00abcdef ? 0xss & x actual write v max := 0x00123456 ? 0xa 7 00123456 ? 0xss00abc def *)s: is a placeholder for the status bits spi_status 4.1.2 spi status bits transferred with each d atag ram read b ack new status information becomes latched at the end of each access and is available with the next spi transfer. spi_status C status flags tra nsmitted with each spi access in bits 39 to 32 bit name comment 7 - reserved (0) 6 status_stop_l(2) ramp_stat 2 [0] C status_stop_l(1) ramp_stat 1 [0] C velocity _reached(2) ramp_stat 2 [8] C velocity_reached(1) ramp_stat 1 [8] C driver_error(2) gstat [2] C g stat ) 1 driver_error(1) gstat [1] C gstat ) 0 reset_flag gstat [ 0 ] C gstat ) 4.1.3 data alignment all data are right aligned. some registers represent uns igned (positive) values, some represent integer values (signed) as twos complement numbers, single bits or groups of bits are represented as single bits respectively as integer groups. 4.2 spi signals the spi bus on the tmc5 07 2 has four signals: - sck C bus clock input - sdi C serial data input - sdo C serial data output - csn C chip select input (active low) the slave is enabled for an spi transaction by a low on the chip select input csn. bit transfer is synchronous to the bus clock sck, with the slave latching the data from sdi on the rising edge of sck and driving data to sdo following the falling edge. the most significant bit is sent first. a minimum of 40 sck clock cycles is required for a bus transaction with the tmc5 07 2. if more than 40 clocks are driven, the additional bits shifted into sdi are shifted out on sdo after a 40 - clock delay through an internal shift register. this can be used for daisy chaining multiple chips. csn must be low during the whole bus transaction. when csn goes high, the contents of the internal shift register are latched into the internal control register and recognized as a command from the master to the slave. if more than 40 bits are sent, only the last 40 bits received before the rising edge of csn are recognized as the command.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 20 www.trinamic.com 4.3 timing the spi interface is synchronized to the internal system clock, which limits the spi bus clock sck to half of the system clock frequency. if the system clock is based on the on - chip oscillator, an additional 10% safety margin must be used to ens ure reliable data transmission. all spi inputs as well as the enn input are internally filtered to avoid triggering on pulses shorter than 20ns. f igure 4 . 1 shows the timing parameters of an spi bus transaction, and the table below specifies their values. f igure 4 . 1 spi timing hint usually this spi timing is referred to as spi mode 3 spi interface timing ac - characteristics clock period: t clk parameter s ymbol conditions min typ max unit sck valid before or after change of csn t cc 10 ns csn high time t csh *) min time is for syn chronous clk with sck high one t ch before csn high only t clk *) >2t clk +10 ns sck low time t cl *) min time is for syn chronou s clk only t clk *) >t clk +10 ns sck high time t ch *) min time is for syn chronous clk only t clk *) >t clk +10 ns sck frequency using internal clock f sck assumes minimum osc frequency 4 mhz sck frequency using external 16mhz clock f sck assumes synchronous clk 8 mhz sdi setup time before rising edge of sck t du 10 ns sdi hold time after rising edge of sck t dh 10 ns data out valid time after falling sck clock edge t do no capacitive load on sdo t filt +5 ns sdi, sck and csn filter delay time t filt rising and falling edge 12 20 30 ns c s n s c k s d i s d o t c c t c c t c l t c h b i t 3 9 b i t 3 8 b i t 0 b i t 3 9 b i t 3 8 b i t 0 t d o t z c t d u t d h t c h
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 21 www.trinamic.com 5 uart single wire interface the uart single wire interface allows the control of the tmc5 07 2 with any microcontroller uart. it shares transmit and receive line like an rs485 based interface. data transmission is secure d using a cyclic redundancy check, so that increased interface distances (e.g. over cables between two pcbs) can be bridged without the danger of wrong or missed commands even in the event of electro - magnetic disturbance. the automatic baud rate detection and an advanced addressing scheme make this interface easy and flexible to use. 5.1 datagram structure 5.1.1 write access uart w rite access datagram structure each byte is lsbmsb, highest byte transmitted first 0 63 sync + reserved 8 bit slave address rw + 7 bit register addr . 32 bit data crc 07 815 1623 2455 5663 1 0 1 0 reserved (dont cares but included in crc) slaveaddr register address 1 data bytes 3, 2, 1, 0 (high to low byte) crc 0 1 2 3 4 5 6 7 8 15 16 23 24 55 56 63 a sync nibble pr ecedes each transmission to and from the tmc 507 2 and is embedded into the first transmitted byte , followed by an addressing byte . e ach transmission allows a synchronization of the internal baud r ate divider to the master clock. t he actual baud rate is adap ted and variations of the internal clock frequency are compensated . thus, the baud rate can be freely chosen within the valid range. each transmitted byte starts with a start bit (logic 0, low level on swiop) and ends with a stop bit (logic 1, high level o n swiop). the bit time is calculated by measuring the time from the beginning of start bit (1 to 0 transition) to the end of the sync frame (1 to 0 transition from bit 2 to bit 3). all data is transmitted byte wise. the 32 bit data words are transmitted wi th the highest byte first. a minimum baud rate of 9000 baud is permissible, assuming 20 mhz clock (worst case for low baud rate). maximum baud rate is f clk /16 due to the required stability of the baud clock. the slave address is determined by the register slaveaddr . if the external address pin nextaddr is set, the slave address becomes incr emented by one. the communication becomes reset if a pause time of longer than 63 bit times between the start bits of two successive bytes occurs . this timing is based on the last correctly received datagram. in this case, the transmission needs to be re started after a failure recovery time of minimum 12 bit times of bus idle time . this scheme allows the master to reset communication in case of transmission errors. any pulse on an idle data line below 16 clock cycles will be treated as a glitch and leads to a timeout of 12 bit times, for which the data line must be idle. other errors like wrong crc are also treated the same way. this allows a safe re - synchronization of the transmission after any error conditions. remark, that due to this mechanism, an abru pt reduction of the baud rate to less than 15 percent of the previous value is not possible. each accepted write datagram becomes acknowledged by the receiver by incrementing an internal cyclic datagram counter (8 bit). reading out the datagram counter al lows the master to check the success of an initialization sequence or single write accesses. read accesses do not modify the counter.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 22 www.trinamic.com 5.1.2 read access uart r ead access request d atagram structure each byte is lsbmsb, highest byte transmitted first sync + reserved 8 bit slave address rw + 7 bit register address crc 0...7 815 1623 2431 1 0 1 0 reserved (dont cares but included in crc ) slaveaddr register address 0 crc 0 1 2 3 4 5 6 7 8 15 16 23 24 31 the read access request datagram structure is identical to the write access datagram structure, but uses a lower number of user bits. its function is the addressing of the slave and the transmission of the desired register address for the read access. the tmc5 07 2 responds with the same baud rate as the master uses for the read request. in order to ensure a clean bus transition from the master to the slave, the tmc5 07 2 does not immediately send the reply to a read access, but it uses a programmable delay time after which the first reply byte becomes sent following a read request. this delay time can be set in multiples of eight bit times using senddelay time setting (default=8 bit times) according to the needs of the master. uart r ead access reply dat agram structure each byte is lsbmsb, highest by te transmitted first 0 ...... 63 sync + reserved 8 bit slave address rw + 7 bit register addr. 32 bit data crc 07 815 1623 2455 5663 1 0 1 0 reserved (0) 0xff register address 0 data bytes 3, 2, 1, 0 (high to low byte) crc 0 1 2 3 4 5 6 7 8 15 16 23 24 55 56 63 the read response is sent to the master using address code %1111. the transmitter becomes switched inactive four bit times after the last bit is sent. address %1111 1111 is reserved for read accesses going to the master . a slave cannot use this address. e rrata i n r ead a ccess a known bug in the uart interface implementation affects read access to registers that change during the access. while the spi interface takes a snapshot of the read register before transmission, the uart in terface transfers the register directly msb to lsb without taking a snapshot. this may lead to inconsistent data when reading out a register that changes during the transmission. further, the crc sent from the driver may be incorrect in this case (but must not), which will lead to the master repeating the read access. as a workaround, it is advised not to read out quickly changing registers like x actual , mscnt or x_enc during a motion, but instead first stop the motor or check the position_reached flag to b ecome active, and read out these values afterwards. if possible, use x_latch and enc_latch for a safe readout during motion (e.g. for homing). as the encoder cannot be guaranteed to stand still during motor stop, only a dual read access and check for ident ical result ensures correct x_enc read data . therefore it is advised to use the latching function instead . use the vzero and velocity_reached flag rather than reading v actual .
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 23 www.trinamic.com 5.2 crc calculation an 8 bit crc polynomial is used for checking both read and wri te access. it allows detection of up to eight single bit errors. the crc8 - atm polynomial with an initial value of zero is applied lsb to msb, including the sync - and addressing byte. the sync nibble is assumed to always be correct. the tmc5 07 2 responds onl y to correctly transmitted datagrams containing its own slave address . it increases its datagram counter for each correctly received write access datagram. ??? = ? 8 + ? 2 + ? 1 + ? 0 hint: the crc can be calculated within a cpu using a bit - wise cyclic xor calculation of incoming and outgoing bits accumulated to an 8 bit crc register. you find the algorithm in the tmc5 07 2 - eval evaluation board firmware . crc = (crc << 1) or (crc.7 xor crc.1 xor crc.0 xor [new incoming bit]) -- crc.n is meant to extract bit n from the 8 bit crc register f or a parallel 8 bit calculation of crc in your cpu, you can use a look - up table. additional algorithms can be found in literature. 5.3 uart signals the uart interface on the tmc5 07 2 has following signals: tmc507 2 uart i nterface s ignals swiop non - inverted data input and output swion inverted data input and output for use in differential transmission . can be left open in a 5v io voltage system. tie to the half io level voltage for best performance in a 3.3v single wire non - differential application . nextaddr address increment pin for sequential addressing scheme sdo/ring a low level on this input selects standard mode, a h igh level switches to ring mode in uart mode (sw_sel high) the slave checks the single wire swiop and swion for correctly received datagrams with its own address continuously. both signals are switched as input during this time. it adapts to the baud rat e based on the sync nibble, as described before. in case of a read access, it switches on its output drivers on swiop and swion and sends its response using the same baud rate.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 2 4 www.trinamic.com 5.4 addressing multiple slaves a ddressing one or two s laves if only one or two t mc507 2 are addressed by a master using a single uart interface, a hardware address selection can be done by setting the nextaddr pins to different levels . a ddressing up to 255 s laves a different approach can address any number of devices by using the inp ut nextaddr as a selection pin . addressing up to 25 5 units is possible . f igure 5 . 1 addressing multiple tmc5 07 2 via single wire interface using chaining proceed as follows: - tie t he nextaddr pin of your first tmc5 07 2 to gnd. - interconnect one of the general purpose io - pins of the first tmc5 07 2 to the next drivers nextaddr pin using an additional pull - up resistor. connect further drivers in the same fashion . - now, the first driver r esponds to address 0. following drivers are set to address 1. - program the first driver to its dedicated slave address. note: once a driver is initialized with its slave address, its general purpose output, which is tied to the next drivers nextaddr has to be programmed as output and set to 0 . - now, the second driver is accessible and can get its slave address. further units can be programmed to their slave addresses sequentially . m a s t e r c p u ( c w i t h u a r t , s o f t w a r e s w i t c h e s t x d t o h i - z f o r r e c e i v i n g ) t m c 5 0 7 2 # 1 n e x t a d d r c s n / i o 0 s w i o p s w i o n t m c 5 0 7 2 # 2 n e x t a d d r s w i o p s w i o n + v i o c s n / i o 0 t m c 5 0 7 2 # 3 n e x t a d d r s w i o p s w i o n + v i o t x d r i d l e + v i o r i d l e f o r c e s s t o p b i t l e v e l i n i d l e c o n d i t i o n s , 3 k 3 i s s u f f i c i e n t w i t h 1 4 s l a v e s r x d 1 0 k 1 0 k a d d r e s s 0 , i o 0 i s h i g h - z a d d r e s s 1 a d d r e s s 1 p r o g r a m t o a d d r e s s 2 5 4 & s e t i o 0 l o w a d d r e s s 0 , i o 0 i s h i g h - z a d d r e s s 1 a d d r e s s 2 5 4 p r o g r a m t o a d d r e s s 2 5 3 & s e t i o 0 l o w a d d r e s s 0 a d d r e s s 2 5 4 a d d r e s s 2 5 3 p r o g r a m t o a d d r e s s 2 5 2 & s e t i o 0 l o w a d d r e s s i n g p h a s e 1 : a d d r e s s i n g p h a s e 2 : a d d r e s s i n g p h a s e 3 : a d d r e s s i n g p h a s e 4 : e x a m p l e f o r a d d r e s s i n g u p t o 2 5 5 t m c 5 0 7 2 a d d r e s s i n g p h a s e x : c o n t i n u e p r o c e d u r e
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 25 www.trinamic.com f igure 5 . 2 addressing multiple tmc5 07 2 via differential interface, additional filtering for nextaddr a different scheme (not shown) uses bus switches (like 74hc4066) to connect the bus to the next unit in the chain without using the nai input. the bus s witch can be controlled in the same fashion, using the nao output to enable it (low level shall enable the bus switch). once the bus switch is enabled it allows addressing the next bus segment. as bus switches add a certain resistance, the maximum number o f nodes will be reduced. it is possible to mix different styles of addressing in a system. for example a system using two boards with each two tmc5 07 2 can have both devices on a board with a different level on nextaddr, while the next board is chained usi ng analog switches separating the bus until the drivers on the first board have been programmed. m a s t e r c p u ( c w i t h r s 4 8 5 t r a n c e i v e r ) t m c 5 0 7 2 # 1 n e x t a d d r c s n / i o 0 s w i o p s w i o n t m c 5 0 7 2 # 2 n e x t a d d r s w i o p s w i o n t m c 5 0 7 2 # 3 s w i o p s w i o n a b a d d r e s s i n g p h a s e 1 : a d d r e s s 0 , i o 0 h i g h a d d r e s s 1 a d d r e s s 1 a d d r e s s i n g p h a s e 2 : p r o g r a m t o a d d r e s s 2 5 4 & s e t i o 0 l o w a d d r e s s 0 , i o 0 h i g h a d d r e s s 1 a d d r e s s i n g p h a s e 3 : a d d r e s s 2 5 4 p r o g r a m t o a d d r e s s 2 5 3 & s e t n a o l o w a d d r e s s 0 , i o 0 h i g h a d d r e s s i n g p h a s e 4 : a d d r e s s 2 5 4 a d d r e s s 2 5 3 p r o g r a m t o a d d r e s s 2 5 2 & s e t i o 0 l o w 1 k + v i o c s n / i o 0 n e x t a d d r e x a m p l e f o r a d d r e s s i n g u p t o 2 5 5 t m c 5 0 7 2 a d d r e s s i n g p h a s e x : c o n t i n u e p r o c e d u r e r t e r m r t e r m r f i l t c f i l t r f i l t c f i l t + v i o 1 0 k + v i o 1 0 k
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 26 www.trinamic.com 5.5 ring mode in a second mode of operation, all slaves are cascaded in a ring. the intention is to allow a simple scheme of addressing without the need for add itional nextaddr wires. at the same time, the distance between each two chips can be kept short due to the chain structure , and the load on each line is only a single input. therefore the logical ring is optimum when wiring cost is critical. in case the ph ysical structure more resembles a line rather than a ring, the devices can be cascaded in a way that each second ic is chained in direction left to right and back. this way, the distance from the last slaves data output to the master is no longer than the distance between three slaves. figure 5 . 3 ring mode example th e ring mode is enabled by tying sdo/ring high and enabling uart mode. in this mode, swio_p is the data input (cmos level) , while swio_n is the data out put. swio_n stays high (idle state) and does forward data coming in via swio_p, until slaveaddr has been programmed. this way, the addressing phase can be accomplished for a number of cascaded slaves . all data is forward ed from swio_p to swio_n after the address setting has been programmed to a value different from 0. having addressed all slaves in the chain allows master requests to go to all slaves, while slave response travels via all devices to the master. the nextadd r input is not required for addressing in this mode, unless two rings with a common start point are intended. please be aware, that data can only pass from any slave through the ring structure back to the master after all slaves have been assigned an addre ss different from 0. do not assign two identical addresses. m a s t e r c p u ( c w i t h u a r t ) t m c 5 0 7 2 # 1 n e x t a d d r s w i o p s w i o n t m c 5 0 7 2 # 2 n e x t a d d r s w i o p s w i o n t m c 5 0 7 2 # n s w i o p s w i o n t x d r x d + v i o s d o / r i n g + v i o s d o / r i n g n e x t a d d r + v i o s d o / r i n g
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 27 www.trinamic.com 6 register mapping this chapter gives an overview of the complete register set. some of the registers bundling a number of single bits are detailed in extra tables. the functional practical applic ation of the settings is detailed in dedicated chapters. note - all registers become reset to 0 upon power up, unless otherwise noted. - add 0x80 to the address addr for write accesses! n otation of hexadecim al and binary number s 0x precedes a hexadecim al number, e.g. 0x04 % precedes a multi - bit binary number, e.g. %100 n otation of r/w field r read only w write only r/w read - and writable register r+c clear upon read o verview r egister m apping r egister d escription general configuration r egister s these registers contain - global configuration - global status flags - slave address configuration - and i/o configuration ramp generator m otion control register s et this register set offers registers for - choosing a ramp mode - choosing velocities - homing - acce le ration and deceleration - target positioning ramp generator driver feature control register s et this register set offers registers for - driver current control - setting th resholds for coolstep operation - setting thresholds for different chopper mode s - setting th resholds for dcstep op eration - reference switch and stallguard2 e vent configuration - a ramp and re ference switch status register encoder register s et the encoder register set offers all registers needed for proper abn encoder operation. motor driver regist er s et this register set offers registers for - setting / reading out microstep table and counter - ch opper and driver configuration - coolstep and stallguard2 configuration - dcstep configuration, and - reading out stallguard2 values and driver error flags
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 28 www.trinamic.com 6.1 gen eral configuration registers g eneral configuration registers (0 x 000 x 0 f) r/w addr n register description / bit names rw 0x00 11 gconf bit gconf C global configuration flags 0 single_driver 0: two motors can be operated. 1: single motor, double current operation - driver 2 outputs are identical to driver 1, all driver 2 related controls are unused in this mode. attention: set correctly before driver enable! 1 stepdir1_enable 0: motor 1 is driven by internal ramp generator 1. 1: external co ntrol of motor 1 using step1 and dir1 C stepdir2_enable 0: motor 2 is driven by internal ramp generator 2. 1: external control of motor 2 using step2 and dir2 C poscmp_enable 0: e ncoder 1 a and b inputs are mapped. 1: position compare pulse (pp) and interrupt output (int) are available, encoder 1 is unused. 4 enc1_refsel 0: n channel 1 mapped depending on interface to swiop (if sw_sel=0) or io0 (if sw_sel=1). 1: n channel 1 mapped to refl1. 5 enc2_enable 0: right reference switches are available. 1: encoder 2 a and b signals are mapped to refr1 and refr2 inputs. 6 enc2_refsel 0: n channel 2 mapped depending on interface to swion (if sw_sel=0) or io1 (if sw_sel=1) . 1: n channel 2 mapped to refl2. 7 test_mode 0: normal operation 1: enable analog test output on pin refr2 slaveaddr selects the function of refr2: 04: t120, dac1, vddh1, dac2, vddh2 attention: not for user, set to 0 for normal operation! 8 shaft1 1: inverse motor 1 direction 9 shaft2 1: inverse motor 2 direction 10 lock_gconf 1: gconf is locked against further write access. 11 dc_sync 1: synchronizes both motors, when both are operated in dcstep mode. the slower motor will slow down the other motor, too.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 29 www.trinamic.com g eneral configuration registers (0 x 000 x 0 f) r/w addr n register description / bit names r+c 0x01 4 gstat bit gstat C global status flags 0 reset 1: indicates that the ic has been reset since the last read access to gstat. all registers have been cleared to reset values. 1 drv_err1 1: indicat es, that driver 1 has been shut down due to overtemperature or short circuit detection since the last read access. read drv_status1 for details. the flag can only be reset when all error conditions are cleared. 2 drv_err2 1: indicates, that driver 2 h as been shut down due to overtemperature or short circuit detection since the last read access. read drv_status2 for details. the flag can only be reset when all error conditions are cleared. 3 uv_cp 1: indicates an undervoltage on the charge pump. th e driver is disabled in this case. r 0x02 8 ifcnt interface transmission counter. this register becomes incremented with each successful uart interface write access. it can be read out to check the serial transmission for lost data. read accesses do not c hange the content. disabled in spi operation. the counter wraps around from 255 to 0. w 0x03 8 + 4 slaveconf bit slaveconf 7 ..0 slaveaddr : sets the address of unit for the uart interface. the address becomes incremented by one when the external addr ess pin nextaddr is active. range: 0 - 253 ( 25 4), default=0 in ring mode, 0 disables forwarding. 11 .. 8 senddelay : 0, 1: 8 bit times, 2, 3: 3*8 bit times 4, 5: 5*8 bit times 6, 7: 7*8 bit times 8, 9: 9*8 bit times 10, 11: 11*8 bit times 12, 13: 13*8 bi t times 14, 15: 15*8 bit times r 0x04 8 + 8 input bit input reads the digital state of all input pins available plus the state of io pins set to output. 0 io0_in : io0 polarity 1 io1_in : io1 polarity 2 io2_in : io2 polarity 3 io3_i n : io3 polarity 4 iop_in: iop pin polarity (always input in spi mode) 5 ion_in : ion pin polarity (always input in spi mode) 6 nextaddr_in : nextaddr pin polarity 7 drv_enn_in : drv_enn pin polarity 8 sw_comp_in : uart input comparator (1: iop voltage is above ion voltage) . the accuracy is about 20mv. 31.. version : 0 x 1 0 =version of the ic
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 30 www.trinamic.com g eneral configuration registers (0 x 000 x 0 f) r/w addr n register description / bit names 24 identical numbers mean full digital compatibility. w 4 + 4 output bit output sets the io output pin polarity and data direction. 0 io0_out : io0 out put polarity 1 io1_out : io1 out put polarity 2 io2_out : io2 out put polarity 3 - 8 ioddr0 (io0: 0=input, 1=output) 9 ioddr1 (io1: 0=input, 1=output) 10 ioddr2 (io2: 0=input, 1=output) 11 - (io3 is always i nput) w 0x05 32 x_compare position comparison register for motor 1 position strobe. activate poscmp_enable to get position pulse on output pp. xactual = x_compare : - output pp becomes high. it returns to a low state, if the positions mismatch.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 31 www.trinamic.com 6.2 ramp ge nerator registers addresses addr are specified for motor 1 (upper value) and motor 2 (second address). 6.2.1 ramp generator motion control register set r amp generator motion control register set (m otor 1: 0 x 200 x 2d, m otor 2: 0 x 400 x 4d) r/w addr n register de scription / bit names range [unit] rw 0x20 0x40 2 rampmode rampmode: 0: positioning mode (using all a, d and v parameters) 1: velocity mode to positive vmax (using amax acceleration) 2: velocity mode to negative vmax (using amax acceleration) 3: hold mode (velocity remains unchanged, unless stop event occurs) 03 rw 0x21 0x41 32 xactual actual motor position (signed) hint: this value normally should only be modified, when homing the drive. in positioning mode, modifying the register content will start a motion. - 2^31 +(2^31) - 1 r 0x22 0x42 24 vactual actual motor velocity from ramp generator (signed) the sign matches the motion direction. a negative sign means motion to lower xactual. + - (2^23) - 1 [steps / t] w 0x23 0x43 18 vstart motor start velocity (unsigned) set vstop vstart! 0(2^18) - 1 [steps / t] w 0x24 0x44 16 a1 first acceleration between vstart and v1 (unsigned) 0(2^16) - 1 [steps / ta2] w 0x25 0x45 20 v1 first acceleration / deceleration phase threshold velocity (unsigned) 0: disables a1 and d1 phase, use am ax , d max only 0(2^20) - 1 [steps / t] w 0x26 0x46 16 amax second acceleration between v1 and vmax (unsigned) this is the acceleration and deceleration value for velocity mode. 0(2^16) - 1 [steps / ta2] w 0x27 0x47 23 vmax motion ramp target velocity (fo r positioning ensure vmax vstart ) (unsigned) this is the target velocity in velocity mode. it can be changed any time during a motion. 0(2^23) - 512 [steps / t] w 0x28 0x48 16 dmax deceleration between vmax and v1 (unsigned) 0(2^16) - 1 [steps / ta2] w 0x2a 0x4a 16 d1 decelera tion between v1 and vstop (unsigned) attention: do not set 0 in positioning mode, even if v1=0! 1(2^16) - 1 [steps / ta2]
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 32 www.trinamic.com r amp generator motion control register set (m otor 1: 0 x 200 x 2d, m otor 2: 0 x 400 x 4d) r/w addr n register de scription / bit names range [unit] w 0x2b 0x4b 18 vstop motor stop velocity (unsigned) attention: set vstop vstart! attention: do not set 0 in positioning mode , m inimum 10 recommended ! 1(2^18) tzerowait waiting time after ramping down to zero velocity before next movement or direction inversion can start and before motor power down starts. time range is about 0 to 2 seconds. this se tting avoids excess acceleration e.g. from vstop to - vstart . 0(2^16) clk rw 0x2d 0x4d 32 xtarget target position for ramp mode (signed). write a new target position to this register in order to activate the ramp generator positioning in rampmode =0. initialize all velocity, acceleration and deceleration parameters before. hint: the position is allowed to wrap around, thus, xtarget value optionally can be treated as an unsigned number. hint: the maximum possible displacement is +/ - ((2^31) - 1). h int: when increasing v1, d1 or dmax during a motion, rewrite xtarget afterwards in order to trigger a second acceleration phase, if desired. - 2^31
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 33 www.trinamic.com 6.2.2 ramp generator driver feature control register set r amp generator driver feature control regi st er set (m otor 1: 0 x 300 x 36, m otor 2: 0 x 500 x 56) r/w addr n register description / bit names w 0x30 0x50 5 + 5 + 4 ihold_irun bit ihold_irun C driver current control 4..0 ihold standstill current (0=1/3231=32/32) in combination with stealthchop mo de, setting ihold =0 allows to choose freewheeling or coil short circuit for motor stand still. 12..8 irun motor run current (0=1/3231=32/32) hint: choose sense resistors in a way, that normal irun is 16 to 31 for best microstep performance. 19. .16 iholddelay controls the number of clock cycles for motor power down after a motion as soon as t zerowait has expired. the smooth transition avoids a motor jerk upon power down. 0: instant power down 1.. 15: delay per current reduction step in multiple of 2^18 clocks w 0x31 0x51 23 vcoolthrs this is the lower threshold velocity for switching on smart energy coolstep and stallguard feature. further it is the upper operation velocity for stealthchop. (unsigned) set this parameter to disable coolstep at low speeds, where it cannot work reliably. the stop on stall function (enable with sg_stop when using internal motion controller) becomes enabled when exceeding this velocity. in non - dcstep mode, it becomes disabled again once the velocity falls below thi s threshold. this allows for homing procedures with stallguard by blanking out the stallguard signal at low velocities (will not work in combination with stealthchop). vhigh | vact | vcoolthrs: - coolstep and stop on stall are enabled, if configured - voltage pwm mode stealthchop is switched off, if configured (only bits 22..8 are used for value and for comparison) w 0x32 0x52 23 vhigh this velocity setting allows velocity de pendent switching into a different chopper mode and fullstepping to maximize torque. (unsigned) | vact | vhigh : - coolstep is disabled (motor runs with normal current scale) - if vhighchm is set, the chopper switches to chm =1 with tfd =0 (constant off time wi th slow decay, only). - if vhighfs is set, the motor operates in fullstep mode. - voltage pwm mode stealthchop is switched off, if configured (only bits 22..8 are used for value and for comparison)
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 34 www.trinamic.com r amp generator driver feature control regi st er set (m otor 1: 0 x 300 x 36, m otor 2: 0 x 500 x 56) r/w addr n register description / bit names w 0x33 0x53 23 vdcmin automatic commutation dcstep becomes e nabled above velocity v dcmin (unsigned) in this mode, the actual position is determined by the sensor - less motor commutation and becomes fed back to xactual . in case the motor becomes heavily loaded, vdcmin also is used as the minimum step velocity. 0: dis able, dcstep off |vact| vdcmin 256: - triggers the same actions as exceeding vhigh . - switches on automatic commutation dcstep hint: also set bits vhighfs and vhighchm and set dcctrl parameters in order to operate dcstep. (only bits 22 sw_mode switch mode configuration s ee separate table ! r+c 0x35 0x55 14 ramp_stat ramp status and switch event status see separate table! r 0x36 0x56 32 xlatch ramp generator latch position, latches xactual up on a programmable switch event (see sw_mode ). hint: the encoder position can be latched to enc_latch together with xlatch to allow consistency checks. t ime reference t for velocities: t = 2^24 / f clk t ime reference ta2 for accelerations: ta2 = 2^41 / (f clk )2
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 35 www.trinamic.com 6.2.2.1 sw_mode C reference switch & stallguard2 event configuration register 0 x 34, 0 x 54: sw_mode C reference switch and stall g uard 2 event configuration register bit name comment 11 en_softstop 0: hard stop 1: soft stop the soft stop mode alwa ys uses the deceleration ramp settings dmax , v 1 , d1 , vstop and tzerowait for stopping the motor. a stop occurs when the velocity sign matches the reference switch position (refl for negative velocities, refr for positive velocities) and the respective swit ch stop function is enabled. a hard stop also uses tzerowait before the motor becomes released. attention: do not use soft stop in combination with stallguard2 . 10 sg_stop 1: enable stop by stallguard2 . disable to release motor after stop event. atten tion: do not enable during motor spin - up, wait until the motor velocity exceeds a certain value, where stallguard 2 delivers a stable result, or set vcoolthrs to a suitable value. 9 en_latch_encoder 1: latch encoder position to enc_latch upon reference swi tch event. 8 latch_r_inactive 1: activates latching of the position to xlatch upon an inactive going edge on the right reference switch input refr. the active level is defined by pol_stop_r. 7 latch_r_active 1: activates latching of the position to xlatc h upon an active going edge on the right reference switch input refr. hint: activate latch_r_active to detect any spurious stop event by reading status_latch_r. 6 latch_l_inactive 1: activates latching of the position to xlatch upon an inactive going edg e on the left reference switch input refl. the active level is defined by pol_stop_l. 5 latch_l_active 1: activates latching of the position to xlatch upon an active going edge on the left reference switch input refl. hint: activate latch_l_active to det ect any spurious stop event by reading status_latch_l. 4 swap_lr 1: swap the left and the right reference switch input refl and refr 3 pol_stop_r sets the active polarity of the right reference switch input 0=non - inverted, high active: a high level on r efr stops the motor 1=inverted, low active: a low level on refr stops the motor 2 pol_stop_l sets the active polarity of the left reference switch input 0=non - inverted, high active: a high level on refl stops the motor 1=inverted, low active: a low level on refl stops the motor 1 stop_r_enable 1: enables automatic motor stop during active right reference switch input hint: the motor restarts in case the stop switch becomes released. 0 stop_l_enable 1: enables automatic motor stop during active left ref erence switch input hint: the motor restarts in case the stop switch becomes released.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 36 www.trinamic.com 6.2.2.2 ramp_stat C ramp and reference switch status register 0 x 35, 0 x 55: ramp_stat C ramp and reference s witch status registe r r/w bit name comment r 13 status_sg 1: sig nals an active stallguard2 input from the coolstep driver or from the dcstep unit, if enabled. hint: when polling this flag, stall events may be missed C activate sg_stop to be sure not to miss the stall event. r+c 12 second_move 1: signals that the aut omatic ramp require d moving back in the opposite direction, e.g. due to on - the - fly parameter change (flag is cleared upon reading) r 11 t_zerowait_ active 1: signals, that t zerowait is active after a motor stop. during this time, the motor is in standstil l. r 10 vzero 1: signals, that the actual velocity is 0. r 9 position_ reached 1: signals, that the target position is reached. this flag becomes set while x actual and xtarget match. r 8 velocity_ reached 1: signals, that the target velocity is reached . this flag becomes set while v actual and vmax match. r+c 7 event_pos_ reached 1: signals, that the target position has been reached ( pos ition _reached becoming active). (flag and interrupt condition are cleared upon reading) this bit is ored to the inter rupt output signal. r+c 6 event_stop_ sg 1: signals an active stallguard2 stop event. reading the register will clear the stall condition and the motor may re - start motion, unless the motion controller has been stopped. (flag and interrupt condition are c leared upon reading) this bit is ored to the interrupt output signal. r 5 event_stop_r 1: signals an active stop right condition due to stop switch. the stop condition and the interrupt condition can be removed by setting ramp_mode to hold mode or by com manding a move to the opposite direction. in soft_stop mode, the condition will remain active until the motor has stopped motion into the direction of the stop switch. disabling the stop switch or the stop function also clears the flag , but the motor will continue motion . this bit is ored to the interrupt output signal. 4 event_stop_l 1: signals an active stop left condition due to stop switch. the stop condition and the interrupt condition can be removed by setting ramp_mode to hold mode or by commanding a move to the opposite direction. in soft_stop mode, the condition will remain active until the motor has stopped motion into the direction of the stop switch. disabling the stop switch or the stop function also clears the flag, but the motor will continu e motion. this bit is ored to the interrupt output signal. r+c 3 status_latch_r 1: latch right ready (enable position latching using switch_mode settings latch_r_active or latch_r_inactive ) (flag is cleared upon reading) 2 status_latch_l 1: latch left ready (enable position latching using switch_mode settings latch_l_active or latch_l_inactive ) (flag is cleared upon reading) r 1 status_stop_r reference switch right status (1=active) 0 status_stop_l reference switch left status (1=active)
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 37 www.trinamic.com 6.3 encod er registers e ncoder register set (m otor 1: 0 x 380 x 3c, m otor 2: 0 x 580 x 5c) r/w addr n register description / bit names range [unit] rw 0x38 0x58 1 2 encmode encoder configuration and use of n channel see separate table! rw 0x39 0x59 32 x_enc actual en coder position (signed) - 2^31 enc_const accumulation constant (signed) 16 bit integer part, 16 bit fractional part x_enc accumulates +/ - enc_const / (2^16* x_enc ) (binary) or +/ - enc_const / (10^4* x_enc ) (decimal) encmode bit enc _sel_decimal switches between decimal and binary setting. use the sign, to match rotation direction! binary: [steps/2^16] (0 reset default = 1.0 (=65536) r+c 0x3b 0x5b 1 enc_status bit 0: n_event 1: encod er n event detected. status bit is cleared on read: read (r) + clear (c) this bit is ored to the interrupt output signal. r 0x3c 0x5c 32 enc_latch encoder position x_enc latched on n event
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 38 www.trinamic.com 6.2.2.3 encmode C encoder register 0 x 38, 0 x 58: encmode C e ncoder reg ister bit name comment 11 latch_now 1 latch x_enc (and x actual if selected by bit latch_x_act ) directly upon write access to encmode . this allows checking the encoder deviation by comparing the x_latch and enc_latch . 0 no action 10 enc_sel_decimal 0 encoder prescaler divisor binary mode: counts enc_const(fractional part) /65536 1 encoder prescaler divisor decimal mode: counts in enc_const(fractional part) /10000 9 latch_x_act 1: also latch x actual position together with x_enc . allows latching th e ramp generator position upon an n channel event as selected by pos_edge and neg_edge . 8 clr_enc_x 0 upon n event, x_enc becomes latched to enc_latch only 1 latch and additionally clear encoder counter x_enc at n - event 7 neg_edge n p n channel event sensitivity 6 pos_edge 0 0 n channel event is active during an active n event level 0 1 n channel is valid upon active going n event 1 0 n channel is valid upon inactive going n event 1 1 n channel is valid upon active going and inactive going n event 5 clr_once 1: latch or latch and c lear x_enc on the next n event following the write access 4 clr_cont 1: always latch or latch and clear x_enc upon an n event (once per revolution , it is recommended to combine this setting with edge sensitive n ev ent ) 3 ignore_ab 0 an n event occurs only when polarities given by pol_n , pol_a and pol_b match. 1 ignore a and b polarity for n channel event 2 pol_n defines active polarity of n (0=neg., 1=pos.) 1 pol_b required b polarity for an n channel event ( 0=neg., 1=pos.) 0 pol_a required a polarity for an n channel event (0=neg., 1=pos.)
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 39 www.trinamic.com 6.4 m icrostep table registers c ommon microstep tabl e regi sters ( m otor 1/2: 0 x 600 x 69 ) r/w addr n register description / bit names range [unit] w 0x60 32 mslut[0] micros tep table entries 031 each bit gives the difference between entry x and entry x+1 when combined with the cor - res ponding mslutsel w bits: 0: w = %00: - 1 %01: +0 %10: +1 %11: +2 1: w = %00: +0 %01: +1 %10: +2 %11: +3 this is the differential coding for the first quarter of a wave. start values for cur_a and cur_b are stored for mscnt position 0 in start_sin and start_sin90 . ofs31, ofs30, , ofs01, ofs00 ofs255, ofs254, , ofs225, ofs224 32x 0 or 1 reset default= sine wave table w 0x61 0x67 7 x 32 mslut [1...7] microstep table entries 32255 7x 32x 0 or 1 reset default= sine wave table w 0x68 32 mslutsel this register defines four segments within each quarter mslut wave. four 2 bit entries determine the meaning of a 0 and a 1 bit in the corre sponding segment of mslut . see separate table! 0 < x1 < x2 < x3 reset default= sine wave table w 0x69 8 + 8 mslutstart bit 7 0: start_sin bit 23 16: start_sin90 start_sin gives the absolute current at microstep table entry 0. start_sin 90 gives the absolute current for microstep table entry at positions 256. start values are transferred to the micro step registers cur_a and cur_b , when ever the reference position mscnt =0 is passed. start_sin reset default =0 start_sin90 reset default =247 ????? ( 248 ? ??? ( 2 ? ?? ? ? 1024 + ?? 1024 ) ) ? 1 m ircostep table calcu lation for a sine wa ve equivalent to the power on default : - i :[0 255] is the tab - the amplitude of the wave is 248. the resulting maximum positive value is 247 and the maximum negative value is - 248. - the round function rounds values from 0.5 to 1.4999 to 1
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 40 www.trinamic.com 6.4.1 mslutsel C look up table segmentation definition 0 x 68: mslutsel C l ook up table segment ation definition bit name function comment 31 x3 lut segment 3 start the sine wave look up table can be divided into up to four segments using an individual step wid th control entry wx . the segment borders are selected by x1 , x2 and x3 . segment 0 goes from 0 to x1 - 1. segment 1 goes from x1 to x2 - 1. segment 2 goes from x2 to x3 - 1. segment 3 goes from x3 to 255. for defined response the values shall satisfy: 0< x1 < x2 < x 3 30 29 28 27 26 25 24 23 x2 lut segment 2 start 22 21 20 19 18 17 16 15 x1 lut segment 1 start 14 13 12 11 10 9 8 7 w3 lut width select from ofs(x3) to ofs255 width control bit coding w0 w3 : %00: mslut entry 0, 1 select: - 1, +0 %01: mslut entry 0, 1 select: +0, +1 %10: mslut entry 0, 1 select: +1, +2 %11: mslut entry 0, 1 select: +2, +3 6 5 w2 lut width select from ofs(x2) to ofs(x3 - 1) 4 3 w1 lut width select from ofs(x1) to ofs(x2 - 1) 2 1 w0 lut width select from ofs00 to ofs(x1 - 1) 0
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 41 www.trinamic.com 6.5 motor driver registers m otor driver register set (m otor 1: 0 x 6a0 x 6f, m otor 2: 0 x 7a0 x 7f) r/w addr n register description / bit names range [unit] r 0x6a 0x7a 10 mscnt microstep counter. indicates actual position in the microstep table for cur_a . cur_b uses an offset of 256 . hint: move to a position where mscnt is zero before re - initializing mslutstart or mslut and mslutsel . 01023 mscur act bit 8 0: cur_a (signed): actual microstep current for motor phase a as read from mslut (not scaled by current) bit 24 16: cur_b (signed): actual microstep current for motor phase b as read from mslut (not scaled by current) +/ - 0...255 rw 0x6c 0 x7c 32 chopconf chopper and driver configuration see separate table! w 0x6d 0x7d 25 coolconf coolstep smart current control register and stallguard2 configuration see separate table! w 0x6e 0x7e 8 + 8 dcctrl dcstep ( dc ) automatic commutation configura tion register: bit 7 0: dc_time : upper pwm on time limit for commutation ( dc_time * 1/f clk ). set slightly above effective blank time tbl . bit 15 8: dc_sg : max. pwm on time for step loss detection using dcstep stallguard2 in dcstep mode. ( dc_sg * 16/f clk ) set slightly higher than dc_ time /16 0=disable r 0x6f 0x7f 32 drv_ status stallguard2 value and driver error flags see separate table!
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 42 www.trinamic.com 6.5.1 chopconf C chopper configuration 0 x 6c, 0 x 7c: chopconf C c hopper c onfiguration bit name function comment 31 - reserved set to 0 30 diss2g short to gnd protection disable 0: short to gnd protection is on 1: short to gnd protection is disabled 29 dedge enable double edge step pulses 1: enable step impulse at each step edge to reduce step frequency requirement. at tention: use only in step/dir mode . step/dir options, set 0 when stepdir_enable = 0 28 intpol16 16 microsteps with interpolation 1: in 16 microstep mode with step/dir interface, the microstep resolution becomes extrapolated to 256 microsteps for smoothes t motor operation 27 mres3 mres micro step resolution %0000: native 256 microstep setting. use this setting when the ic is operated with the internal ramp generator. 26 mres2 25 mres1 24 mres0 %0001 %1000: 128, 64, 32, 16, 8, 4, 2, fullste p reduced microstep resolution for step/dir operation. the resolution gives the number of microstep entries per sine quarter wave. especially when switching to a low resolution of 8 microsteps and below, take care to switch at certain microstep positions . the switching position determines the sequence of patterns. step width=2^ mres [microsteps] hint: reduced microstep resolutions are also useful in special cases to extend the acceleration or position range 23 - reserved set to 0 22 - 21 - 20 - 19 vhighchm high velocity chopper mode this bit enables switching to chm =1 and fd =0, when vhigh is exceeded. this way, a higher velocity can be achieved. can be combined with vhighfs =1. if set, the toff setting automatically becomes doubled during high ve locity operation in order to avoid doubling of the chopper frequency. 18 vhighfs high velocity fullstep selection this bit enables switching to fullstep, when vhigh is exceeded. switching takes place only at 45 position. the fullstep target current uses the current value from the microstep table at the 45 position. 17 vsense sense resistor voltage based current scaling 0: low sensitivity, high sense resistor voltage 1: high sensitivity, low sense resistor voltage 16 tbl1 tbl blank time select %00 %11 : set comparator blank time to 16, 24, 36 or 54 clocks hint : %01 or %10 recommended for most applications 15 tbl0 14 chm chopper mode 0 standard mode (spreadcycle) 1 constant off time with fast decay time. fast decay time is also terminated wh en the negative nominal current is reached. fast decay is after on time. 13 rndtf random toff time 0 chopper off time is fixed as set by toff 1 random mode, toff is random modulated by dn clk = - 12 +3 clocks. 12 disfdcc fast decay mode chm =1: disfd cc =1 disables current comparator usage for termi - nation of the fast decay cycle
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 43 www.trinamic.com 0 x 6c, 0 x 7c: chopconf C c hopper c onfiguration bit name function comment 11 fd3 tfd [3] chm =1: msb of fast decay time setting tfd 10 hend3 hend hysteresis low value offset sine wave offset chm =0 %0000 %1111: 1, 0, 1, , hend2 8 hend1 7 hend0 chm =1 %0000 %1111: 1, 0, 1, , 12 hstrt2 hstrt hysteresis start value added to hend chm =0 %000 %111: add 1, 2, , 8 to hysteresis low value hend (1/512 of this setting adds to current setting) attenti on: effective hend+hstrt 16. hint: hysteresis decrement is done each 16 clocks 5 hstrt1 4 hstrt0 tfd [2..0] fast decay time setting chm =1 fast decay time setting (msb: fd3 ): %0000 %1111: tfd with n clk = 32* hstrt (%0000: slow decay only) 3 t off3 toff off time and driver enable off time setting controls duration of slow decay phase n clk = 12 + 32* toff %0000: driver disable, all bridges off %0001: 1 C tbl %0010 %1111: 2 15 toff2 1 toff1 0 toff0
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 44 www.trinamic.com 6.5.2 coolcon f C smart energy control coolstep and stallguard2 0 x 6d, 0 x 7d: coolconf C s mart e nergy control cool s tep and stall g uard 2 bit name function comment - reserved set to 0 24 sfilt stallguard2 filter enable 0 standard mode, high time resolution for stallgua rd2 1 filtered mode, stallguard2 signal updated for each four fullsteps only to compensate for motor pole tolerances 23 - reserved set to 0 22 sgt6 stallguard2 threshold value this signed value controls stallguard2 level for stall output and sets the optimum measurement range for readout. a lower value gives a higher sensitivity. zero is the starting value working with most motors. - 64 to +63: a higher value makes stallguard2 less sensi tive and requires more torque to indicate a stall. 21 sgt5 20 sgt4 19 sgt3 18 sgt2 17 sgt1 16 sgt0 15 seimin minimum current for smart current control 0: 1/2 of current setting ( irun ) 1: 1/4 of current setting ( irun ) 14 sedn1 current down step speed %00: for each 32 stallguard2 values decrease by o ne %01: for each 8 stallguard2 values decrease by one %10: for each 2 stallguard2 values decrease by one %11: for each stallguard2 value decrease by one 13 sedn0 12 - reserved set to 0 11 semax3 stallguard2 hysteresis value for smart current control i f the stallguard2 result is equal to or above ( semin + semax+ 1)*32, the motor current becomes decreased to save energy. %0000 %1111: 0 15 10 semax2 9 semax1 8 semax0 7 - reserved set to 0 6 seup1 current up step width current increment steps p er measured stallguard2 value %00 %11: 1, 2, 4, 8 5 seup0 4 - reserved set to 0 3 semin3 minimum stallguard2 value for smart current control and smart current enable if the stallguard2 result falls below semin *32, the motor current becomes increase d to reduce motor load angle. %0000: smart current control coolstep off %0001 %1111: 1 15 2 semin2 1 semin1 0 semin0
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 45 www.trinamic.com 6.5.3 drv_status C stallguard2 value and driver error flags 0 x 6f, 0 x 7f: drv_status C stall g uard 2 value and driver err or flags b it name function comment 31 stst standstill indicator this flag indicates motor stand still in each operation mode. it is especially useful for step & dir mode. 30 olb open load indicator phase b 1: open load detected on phase a or b. hint: this is just an informative flag. the driver takes no action upon it. false detection may occur in fast motion and standstill. check during slow motion or after a motion , only. 29 ola open load indicator phase a 28 s 2gb short to ground indicator phase b 1: short to gnd detected on phase a or b. the driver becomes disabled. the flags stay active, until the driver is disabled by software ( toff =0) or by the enn input. 27 s 2ga short to ground indicator phase a 26 otpw overtemperature pre - warning flag 1: overtemperatur e pre - warning threshold is exceeded. the overtemperature pre - warning flag is common for both drivers. 25 ot overtemperature flag 1: overtemperature limit has been reached. drivers become disabled until otpw is also cleared due to cooling down of the ic. t he overtemperature flag is common for both drivers. 24 stallguar d stallguard2 status 1: motor stall detected ( sg_result =0) or dcstep stall in dcstep mode. 23 - reserved ignore these bits 22 21 20 cs actual actual motor current / smart energy cur rent actual current control scaling, for monitoring smart energy current scaling controlled via settings in register coolconf , or for monitoring the function of the automatic current scaling. 19 18 17 16 15 fsactive full step active indica tor 1: indicates that the driver has switched to fullstep as de fi ned by chopper mode settings and velocity thre sholds. 14 - reserved ignore these bits 13 12 11 10 9 sg_ result stallguard2 result respectively pwm on time for coil a in stand still for motor temperature detection mechanical load measurement: the stallguard2 result gives a means to measure mecha nical motor load. a higher value means lower mecha nical load. a value of 0 signals highest load. with opti mum sgt setting, this is an indicator for a motor stall. the stall detection compares sg_result to 0 in order to detect a stall. sg_result is used as a base for coolstep operation, by comparing it to a pro grammable upper and a lower limit. it is not applicable in stealthchop mode. sg_result is also applicable when dcstep is active . stallguard2 works best with microstep operation. temperature measurement: in standstill, no stallguard2 result can be obtained. sg_result shows the chopper on - time for motor coil a instead. if the m otor is moved to a determined micro step position at a certain current setting, a comparison of the chopper on - time can help to get a rough estimation of motor temperature. as the motor heats up, its coil resistance rises and the chopper on - time increases. 8 7 6 5 4 3 2 1 0
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 46 www.trinamic.com 6.6 voltage pwm mode stealthchop m otor driver pwm register set (m otor 1: 0 x 100 x 17, m otor 2: 0 x 180 x 1f) r/w addr n register description / bit names range [unit] w 0x10 0x18 22 pwmconf voltage pwm m ode chopper configuration see separate table! r 0x11 0x19 8 pwm_ status actual pwm scaler (255=max. voltage) 0255 6.6.1 pwmconf C voltage pwm mode stealthchop 0 x 1 0 , 0 x 18 : pwmconf C v oltage mode pwm bit name function comment - reserved s et to 0 21 freew heel1 allows different standstill modes stand still option when motor current setting is zero ( i_hold =0). %00: normal operation %01: freewheeling %10: coil shorted using ls drivers %11: coil shorted using hs drivers 20 freewheel0 19 - reserved set to 0 18 pwm_ autoscale pwm automatic amplitude scaling 0 user defined pwm amplitude. the current settings have no influence. 1 enable automatic current control attention: when using a user defined sine wave table, the amplitude of this sine wave tabl e should not be less than 244. best results are obtained with 247 to 252 as peak values. 17 pwm_freq1 pwm frequency selection %00: f pwm = 2 /1024 f clk %01: f pwm =2 /683 f clk %10: f pwm =2 /512 f clk %11: f pwm =2 /410 f clk 16 pwm_freq0 15 pwm_ grad user defi ned regulation loop gradient (bits 15 12 currently unused, set to 0) pwm_ autoscale=0 0: stealthchop disabled 115: stealthchop enabled (the actual value is not used) 14 13 12 11 pwm_ autoscale=1 0: stealthchop disabled 115: user defi ned maximum pwm amplitude change per half wave (1 to 15) 10 9 8 7 pwm_ ampl user defined amplitude pwm_ autoscale=0 user defined pwm amplitude the resulting amplitude (0255) is set by this value. 6 5 4 3 pwm_ autoscale=1 user defined maximum pwm amplitude when switching back from current chopper mode to voltage pwm mode (switch over velocity defined by tpwmthrs). do not set too low values, as the regulation cannot measure the current when the actual pwm value goes below a setting specific value. settings above 0x40 recommended. 2 1 0
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 47 www.trinamic.com 7 current setting the internal 5 v supply voltage available at the pin 5vout is used as a reference for the coil current regulation based on the sense resistor voltage measurement. the desired maximum motor current is set by selecting an appropriate value for the sense resistor. the sens e resistor voltage range can be selected by the vsense bit in chopconf . the low sensitivity setting (high sense resistor voltage, vsense =0) brings best and most robust current regulation, while high sensitivity (low sense resistor voltage, vsense =1) reduce s power dissipation in the sense resistor. the high sensitivity setting reduces the power dissipation in the sense resistor by nearly half. after choosing the vsense setting and selecting the sense resistor, the currents to both coils are scaled by the 5 - bit current scale parameters ( ihold , irun ). the sense resistor value is chosen so that the maximum desired current (or slightly more) flows at the maximum current setting ( irun = %11111). using the internal sine wave table, which has the amplitude of 248, the rms motor current can be calculated by: ? ??? = ?? + 1 32 ? ? ?? ? ????? + 20 ? ? ? 1 2 the momentary motor current is calculated by: ? ??? = ??? ? / ? 248 ? ?? + 1 32 ? ? ?? ? ????? + 20 ? ? cs is the current scale setting as set by the ihold and irun a nd coolstep. v fs is the full scale voltage as determined by vsense control bit (please refer to electrical characteristics, v srtl and v srth ). cur a/b is the actual value from the internal sine wave table. the internal resistance of 20m? will be increased by external trace resistance, 5m? are realistic. c hoice of r sense and resulting max . motor current r sense [?] rms current [a] (cs=31, vsense=0) rms current [a] (cs=31, vsense=1) 1.00 0.21 0.12 0.82 0.26 0.15 0.75 0.28 0.16 0.68 0.31 0.18 0.50 0.42 0 .24 0.47 0.45 0.25 0.33 0.63 0.35 0.27 0.76 0.43 0.22 0.91 0.51 0.15 1.29*) 0.72 *) value exceeds upper current rating for single motor operation. hint for best precision of current setting, it is advised to measure and fine tune the current in the application.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 48 www.trinamic.com parameter description setting comment irun current scale when motor is running. scales coil current values as taken from the internal sine wave table. for high precision motor operation, work with a current scaling factor in the range 16 to 31, because scaling down the current values reduces the effective microstep resolution by making microsteps coarser. this setting also controls the maximum current value set by coolstep. 0 31 1/32, 2/32, 32/32 ihold identical to ir un , but for motor in stand still. ihold delay allows smooth current reduction from run current to hold current. iholddelay controls the number of clock cycles for motor power down after t zerowait in increments of 2^18 clocks: 0=instant power down, 1..15 : current reduction delay per current step in multiple of 2^18 clocks. example: when using irun =31 and ihold =16, 15 current steps are required for hold current reduction. a iholddelay setting of 4 thus results in a power down time of 4*15*2^18 clock cycle s, i.e. roughly one second at 16mhz. 0 instant ihold 1 15 18 15*2 18 clocks per current decrement vsense allows control of the sense resistor voltage range for full scale current. 0 v fs = 0.32 v 1 v fs = 0.18 v 7.1 sense resistors sense resistors should be carefully selected. the full motor current flows through the sense resistors. they also see the switching spikes from the mosfet bridges. a low - inductance type such as film or composition res istors is required to prevent spikes causing ringing on the sense voltage inputs leading to unstable measurement results. a low - inductance, low - resistance pcb layout is essential. any common gnd path for the two sense resistors must be avoided, because thi s would lead to coupling between the two current sense signals. a massive ground plane is best. please also refer to layout considerations in chapter 24 . the sense resistor needs to be able to conduct the peak motor coil curre nt in motor standstill conditions, unless standby power is reduced. under normal conditions, the sense resistor conducts less than the coil rms current, because no current flows through the sense resistor during the slow decay phases. the peak sense resis tor power dissipation is: ? ????? = ? ???? 2 ? ? ????? for high current applications, power dissipation is halved by using the low vsense setting and using an adapted resistance value. please be aware, that in this case any voltage drop in pcb traces has a larg er influence on the result. a compact layout with massive ground plane is best to avoid parasitic resistance effects.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 49 www.trinamic.com 8 stealthchop? stealthchop is an extremely quiet mode of operation for low and medium velocities. it is based on a voltage mode pwm. in c ase of standstill and at low velocities, the motor is absolutely noiseless. thus, stealthchop operated stepper motor applications are very suitable for indoor or home use. the motor operates absolutely free of vibration at low velocities. with stealthchop, the motor current is applied by driving a certain effective voltage into the coil, using a voltage mode pwm. there are no more configurations required except for the regulation of the pwm voltage to yield the motor target current. two algorithms are provi ded, a manual and an automatic mode. figure 8 . 1 motor coil sine wave current with stealthchop (measured with current probe) 8.1 two modes for current regulation in order to match the motor current to a certain level, the voltage mode pwm voltage must be scaled depending on the actual motor velocity. several additional factors influence the required voltage level to drive the motor at the target current: the motor resistance, its back emf (i.e. directly proportio nal to its velocity) as well as actual level of the supply voltage. for the ease of use, two modes of pwm regulation are provided: an automatic mode using current feedback ( pwm_autoscale = 1) and a fixed scale mode ( pwm_autoscale = 0). the fixed scale mode will not react to a change of operating conditions like the supply voltage or to events like a motor stall, but it provides very stable amplitude. it does not use nor require any means of current measurement. this is perfect when motor type , velocity and supply voltage are well known. since this mode does not measure the actual current, it will not respond to modification of the current setting, like stand still current reduction. therefore we recommend the automatic mode, unless current regulation is not satisfying in the given operating conditions. the pwm frequency can be chosen in a range in four steps in order to adapt the frequency divider to the frequency of the clock source. an optimum setting is slightly above the audible frequency range. a slightl y higher value might bring a benefit for some applications. c hoice of pwm frequency for stealt h c hop clock frequency f clk pwm_freq=%00 f pwm =2 /1024 f clk pwm_freq=%01 f pwm = 2 /683 f clk pwm_freq=%10 f pwm = 2 /512 f clk pwm_freq=%11 f pwm = 2 /410 f clk 18mhz 35.2khz 5 2.7khz 70.3khz 87.8khz 16mhz 31.3khz 46.9khz 62.5khz 78.0khz (internal) ? ? ? ? table 8 . 1 choice of pwm frequency C green: recommended
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 50 www.trinamic.com 8.2 automatic scaling in stealthchop voltage pwm mode, the autoscaling function ( pwm_autoscale = 1) regulates the motor current to the desired current setting. the driver measures the motor curr ent during the chopper on time and uses a proportional regulator to regulate the pwm_scale in order match the motor current to the target current. pwm_grad is the proportionality coefficient for this regulator. basically, the proportionality coefficient sh ould be as small as possible in order to get a stable and soft regulation behavior, but it must be large enough to allow the driver to quickly react to changes caused by variation of the motor target current, the motor velocity or effects resulting from ch anges of the supply voltage. as the supply voltage level and motor temperature normally change only slowly, a minimum setting of the regulation gradient often is sufficient ( pwm_grad =1). if stealthchop operation is desired for a higher velocity range, vari ations of the motor back emf caused by motor acceleration and deceleration may require a quicker regulation. pwm_grad setting should be optimized for the fastest required acceleration and deceleration ramp (see figure 8 . 4 ). the qu ality of a given setting can be examined when monitoring pwm_scale and motor velocity. just as in the acceleration phase, during a deceleration phase the voltage pwm amplitude must be adapted in order to keep the motor coil current constant. when the upper acceleration and the upper deceleration used in the application are identical, the value determined for the acceleration phase will already be optimum for both. figure 8 . 2 scope shot: good setting for pwm_ grad figure 8 . 3 scope shot: too small setting for pwm_grad
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 51 www.trinamic.com figure 8 . 4 good and too small setting for pwm_grad be sure to use a s ymmetrical sense resistor layout and sense resistor traces of identical length and well matching sense resistors for best performance. quick start for a quick start, see the quick configuration guide in chapter 18 . 8.2.1 lower curr ent limit the autoscaling function imposes a lower limit for motor current regulation. as the coil current can be measured in the shunt resistor during chopper on phase, only, a minimum chopper duty cycle allowing coil current regulation is given by the bl ank time as set by tbl and by the chopper frequency setting. therefore, the motor specific minimum coil current in stealthchop autoscaling mode rises with the supply voltage and the chopper frequency . a lower blanking time allows a lower current limit. ext remely low currents (e.g. for standstill power down) can be realized with the non - automatic current scaling or with the freewheeling option, only. the run current setting needs to be kept above the lower limit: in case the pwm_scale drops to a too low valu e, e.g. because the current scale was too low, the regulator may not be able to recover. the regulator will recover once the motor is in standstill. the lower motor coil current limit can be calculated from motor parameters and chopper settings: ? ????? ????? = ? ????? ? ? ??? ? ? ? ? ???? v e l o c i t y t i m e s t a n d s t i l l p w m s c a l e p w m r e a c h e s m a x . a m p l i t u d e 2 5 5 0 m o t o r c u r r e n t n o m i n a l c u r r e n t ( s i n e w a v e r m s ) r m s c u r r e n t c o n s t a n t 0 p w m s c a l e c u r r e n t m a y d r o p d u e t o h i g h v e l o c i t y v e l o c i t y t i m e s t a n d s t i l l p w m s c a l e 2 5 5 0 m o t o r c u r r e n t n o m i n a l c u r r e n t ( s i n e w a v e r m s ) 0 p w m s c a l e p w m _ g r a d t o o s m a l l p w m _ g r a d o k c u r r e n t d r o p s d u e t o t o o s m a l l p w m _ g r a d c u r r e n t o v e r s h o o t s d u e t o t o o s m a l l p w m _ g r a d p w m _ g r a d o k s e t t i n g f o r p w m _ g r a d o k . s e t t i n g f o r p w m _ g r a d s l i g h t l y t o o s m a l l .
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 52 www.trinamic.com with v m the motor supply voltage and r coil the motor coil resistance. i lower limit can be treated as a thumb value for the minimum possible motor current setting. example : a mo tor has a coil resistance of 5?, the supply voltage is 24v. with tbl =%01 and pwm_freq =%00, t blank is 24 clock cycles, f pwm is 2/(1024 clock cycles): ? ????? ????? = 24 ? ??? ? 2 1024 ? ??? ? 24 ? 5? = 24 512 ? 24 ? 5? = 225 ?? for p wm_autoscale mode, a lower coil current limit applies. this limit can be calculated or measured using a current probe. keep the motor run - current setting irun well above this lower current limit. 8.2.2 pwm_ampl for using stealthchop and spreadcycle when combin ing stealthchop with spreadcycle or constant off time classic pwm, a switching velocity can be chosen using vcool thrs . with this, stealthchop is only active at low velocities. often, a very low velocity in the range of 1 to a few 10 rpm fits best. in case a high switching velocity is chosen, special care should be taken for switching back to stealthchop during deceleration, because the phase jerk can produce a short time overcurrent. (refer to chapter 8.4 for more details about combining stealthchop with other chopper modes.) to avoid a short time overcurrent and to minimize the jerk, the initial amplitude for switching back to stealthchop at sinking velocity can be determined using the setting pwm_ampl . tune pwm_ampl to a value which gives a smooth and safe transition back to stealthchop within the application. as a thumb rule, ? to ? of the last pwm_scale value which was valid after the switching event at rising velocity can be used. for high resistive steppers as well as for lo w transfer velocities (as set by vcoolthrs ), pwm_ampl can be set to 255 as most universal setting. note the autoscaling function only starts up regulation during motor standstill. after enabling stealthchop and setting all parameters, be sure to wait unti l pwm_scale has reached a stable state before starting a motion. failure to do so will result in zero motor current! in case the automatic scaling regulation is instable at your desired motion velocity, try modifying the chopper frequency divider pwm_freq . also adapt the blank time tbl and motor current for best result. 8.2.3 acceleration in automatic current regulation mode ( pwm_autoscale = 1), the pwm_grad setting should be optimized for the fastest required acceleration ramp. use a current probe and check the motor current during (quick) acceleration. a setting of 1 may result in a too slow regulation, while a setting of 15 responds very quickly to velocity changes, but might produce regulation instabilities in some constellations. a setting of 4 is a good sta rting value. hint operate the motor within your application when exploring stealthchop. motor performance often is better with a mechanical load, because it prevents the motor from stalling due mechanical oscillations which can occur without load. 8.3 fixed s caling non - automatic, fixed scaling scales the stealthchop amplitude based on the user defined value pwm_ampl . the stepper motor has a certain coil resistance and thus needs a certain voltage amplitude to yield a target current based on the basic formula i =u/r. with r being the coil resistance, u the supply voltage scaled by the pwm value, the current i results. the initial value for pwm_ampl at low velocities can be calculated:
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 53 www.trinamic.com ??? _ ???? = 374 ? ? ???? ? ? ???? ? ? with v m the motor supply voltage and i coil the target rms current the effective pwm voltage u pwm (1/sqrt(2) x peak value) results considering the 8 bit resolution and 248 sine wave peak for the ac tual pwm amplitude shown as pwm_scale : ? ??? = ? ? ? ??? _ ????? 256 ? 248 256 ? 1 2 = ? ? ? ??? _ ????? 374 with rising motor velocity, the motor generates an increasing back emf voltage. the back emf voltage is proportional to the motor velocity. it reduces the pwm voltage effective at the coil resistance and thus current decreases. a higher scale value is necessary to compensate for this. when a higher value is choose n , it should be made sure, that the maximum driver current i s not exceeded during the acceleration phase. this can be checked with the above formula. a short time excess current will not do harm to the motor. hint the setting for pwm_ampl can easily be optimized by tracing the motor current with a current probe o n the oscilloscope. it is not even necessary to calculate the formulas if you carefully start with a low setting for both.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 54 www.trinamic.com 8.4 combining stealthchop with other chopper modes the tmc 5072 allows combining stealthchop and different chopper modes based on veloci ty thresholds. this way, the optimum chopper principle can be chosen for different velocity ranges. as a first step, both chopper principles should be parameterized and optimized individually. in a next step, a transfer velocity has to be fixed. for exampl e, stealthchop operation is used for precise low speed positioning, while spreadcycle shall be used for highly dynamic motion. vcool thrs determines the transition velocity. use a low transfer velocity to avoid a jerk at the switching point. a jerk occurs w hen switching at higher velocities, because the back - emf of the motor (which rises with the velocity) causes a phase shift of up to 90 between motor voltage and motor current. so when switching at higher velocities between voltage pwm and current pwm mode , this jerk will occur with increased intensity. at low velocities (e.g. 1 to a few 10 rpm), it can be completely neglected for most motors. therefore, the vcoolthrs should be set to a low velocity, in order to eliminate any jerk in case an automatic switc hing between two chopper modes is desired. set vcoolthrs and vhigh to high values (above vmax ) if you want to work with stealthchop only. when enabling the stealthchop mode the first time using automatic current regulation, the motor must be at stand still in order to allow a proper current regulation. when the drive switches to a different chopper mode at a higher velocity, stealthchop logic stores the last current regulation setting until the motor returns to a lower velocity again. this way, the regulati on has a known starting point when returning to a lower velocity, where stealthchop becomes re - enabled. therefore, neither the velocity threshold nor the supply voltage must be considerably changed during the phase while the chopper is switched to a differ ent mode, because otherwise the motor might lose steps or the instantaneous current might be too high or too low. a motor stall or a sudden change in the motor velocity may lead to the driver detecting a short circuit or to a state of automatic current reg ulation, from which it cannot recover. clear the error flags and restart the motor from zero velocity to recover from this situation. hint start the motor from standstill when switching on stealthchop the first time and keep it stopped for at least 128 ch opper periods to allow stealthchop to do initial standstill current control.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 55 www.trinamic.com 8.5 flags in stealthchop 8.5.1 open load flags in stealthchop mode, status information is different from the cycle - by - cycle regulated chopper modes. ola and olb show if the current regul ation sees that the nominal current can be reached on both coils. - a flickering ola or olb can result from tiny asymmetries in the sense resistors or in the motor coils. - an interrupted motor coil leads to a continuously active open load flag for the coil. - both flags are active, if the current regulation did not succeed in scaling up to the full target current within the last few fullsteps (because no motor is attached or a high acceleration required a quick action of the current regulator). with automati c scaling and pwm_grad > 1, the current regulation tries to increase the current quickly to reach the target current in the interrupted motor coil. at the same time but a bit slower the current regulation tries to decrease the motor current due to the othe r motor coil seeing too high current. therefore it is recommended to do an on - demand open load test using the spreadcycle or classic chopper prior to operation in stealthchop, and not to switch on stealthchop in case of open load failure. alternatively, p wm_scale can be checked for plausible values. 8.5.2 pwm_scale informs about the motor state information about the motor state is available with automatic scaling by reading out pwm_scale . as this parameter reflects the actual voltage required to drive the targ et current into the motor, it depends on several factors: motor load, coil resistance, supply voltage, and current setting. therefore, an evaluation of the pwm_scale value allows seeing the motor load (similar to stallguard2) and finding out if the target current can be reached. it even gives an idea on the motor temperature (evaluate at a well - known state of operation).
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 56 www.trinamic.com 8.6 freewheeling and passive motor braking stealthchop provides different options for motor standstill. these options can be enabled by set ting the standstill current ihold to zero and choosing the desired option using the freewheel setting. the desired option becomes enabled after a time period specified by t zerowait and ihold_delay . the pwm_scale regulation becomes frozen once the motor tar get current is at zero current in order to ensure a quick startup. parameter description setting comment vcoolthrs vhi g h whichever is lower, s pecifies the upper velocity for operation i n stealthchop voltage pwm mode. 0 pwm_ autoscale enable a utomatic current scaling using current measurement or use fixed s caling mode. 0 fixed mode 1 automatic scaling with current regulator pwm_freq pwm frequency selection. stealthchop uses a fixed pwm frequency by dividing the system clock frequency using a programmable divider. use the lowest setting giving good results. 0 f pwm =1/1024 f clk 1 f pwm =1/683 f clk 2 f pwm =1/512 f clk 3 f pwm =1/410 f clk pwm_grad global enable and r egulation loop gradient when pwm_autoscale =1. 0 do not use stealthchop 1 pwm_ampl user defined pwm amplitude for fixed scaling or amplitude limit for re - entry into stealthchop mode when pwm_autoscale =1. 0 255 freewheel stand still option when motor current setting is zero ( i_hold =0). only available with stealthchop enabled. the freewheeling option makes the motor easy movable, while both coil short options realize a passive brake. mode 2 will brake more intensely than mode 3, because low side drivers (ls) have lower resistance than high side drivers. 0 normal operation 1 freewheeling 2 coil shorted using ls drivers 3 coil shorted using hs drivers pwm_scale read back of the actual stealthchop voltage pwm scaling as determined by the current regulation. can be used to detect motor load and sta ll when autoscale =1. 0 255 toff general enable for the motor driver, the actual value does not influence stealthchop 0 driver off 1 15 tbl selec ts the comparator blank time . this time needs to safely cover the switching event and the duration of the ringing on the sense resistor. for most applications, a setting of 1 or 2 is good. for highly capacitive loads, e.g. when filter networks are used, a setting of 2 or 3 will be required. a lower setting allows stealthchop to regulate down to lower coil current values. 0 16 t clk 1 24 t clk 2 36 t clk 3 54 t clk irun ihold run and hold current setting for stealth chop operation C pwm _a utoscale =1 see chapter on current setting for details
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 57 www.trinamic.com 9 spreadcycle and classic chopper while stealthchop is a voltage mode pwm controlled chopper, spreadcycle is a cycle - by - cycle current control. therefore, it can react extremely fast to changes in m otor velocity or motor load. the currents through both motor coils are controlled using choppers. the choppers work independently of each other. in f igure 9 . 1 the different chopper phases are shown. f igure 9 . 1 chopper phases although the current could be regulated using only on phases and fast decay phases, insertion of the slow decay phase is important to reduce electrical losses and current ripple in th e motor. the duration of the slow decay phase is specified in a control parameter and sets an upper limit on the chopper frequency. the current comparator can measure coil current during phases when the current flows through the sense resistor, but not dur ing the slow decay phase, so the slow decay phase is terminated by a timer. the on phase is terminated by the comparator when the current through the coil reaches the target current. the fast decay phase may be terminated by either the comparator or anothe r timer. when the coil current is switched, spikes at the sense resistors occur due to charging and discharging parasitic capacitances. during this time, typically one or two microseconds, the current cannot be measured. blanking is the time when the input to the comparator is masked to block these spikes. there are two cycle - by - cycle chopper modes available: a new high - performance chopper algorithm called spreadcycle and a proven constant off - time chopper mode. the constant off - time mode cycles through thr ee phases: on, fast decay, and slow decay. the spreadcycle mode cycles through four phases: on, slow decay, fast decay, and a second slow decay. the chopper frequency is an important parameter for a chopped motor driver. a too low frequency might generate audible noise. a high er frequency reduces current ripple in the motor, but with a too high frequency magnetic losses may rise. also power dissipation in the driver rises with increasing frequency due to the increased influence of switching slopes causing d ynamic dissipation. therefore, a compromise needs to be found. most motors are optimally working in a frequency range of 16 khz to 3 0 khz. the chopper frequency is influenced by a number of parameter settings as well as by the motor inductivity and supply voltage. hint a chopper frequency in the range of 16 khz to 3 0 khz gives a good result for most motors when using spreadcycle . a higher frequency leads to increase d switching losse s . it is advised to check the resulting frequency and to work below 50 khz . r s e n s e i c o i l o n p h a s e : c u r r e n t f l o w s i n d i r e c t i o n o f t a r g e t c u r r e n t r s e n s e i c o i l f a s t d e c a y p h a s e : c u r r e n t f l o w s i n o p p o s i t e d i r e c t i o n o f t a r g e t c u r r e n t r s e n s e i c o i l s l o w d e c a y p h a s e : c u r r e n t r e - c i r c u l a t i o n + v m + v m + v m
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 58 www.trinamic.com three parameters are used for controlling both chopper modes: 9.1 spreadcycl e chopper the spreadcycle (patented) chopper algorithm is a precise and simple to use chopper mode which automatically determines the optimum length for the fast - decay phase. the spreadcycle will provide superior microstepping quality even with default set tings. several parameters are available to optimize the chopper to the application. each chopper cycle is comprised of an on phase, a slow decay phase, a fast decay phase and a second slow decay phase (see f igure 9 . 3 ). the two sl ow decay phases and the two blank times per chopper cycle put an upper limit to the chopper frequency. the slow decay phases typically make up for about 3 0% - 7 0 % of the chopper cycle in standstill and are important for low motor and driver power dissipation . calculation of a starting value for the slow decay time toff : assumptions: target chopper frequency: 25 khz two slow decay cycles make up for 50 % of overall chopper cycle time ? ??? = 1 25 ??? ? 50 100 ? 1 2 = 10 ? for the toff setting this me ans: ???? = ( ? ??? ? ? ??? ? 12 ) / 32 with 12 mhz clock this gives a setting of toff= 3.4 , i.e. 3 or 4 . with 16 mhz clock this gives a setting of toff= 4.6 , i.e. 4 or 5 . the hysteresis start setting forces the driver to introduce a minimum amount of current ripple into the motor coils. the current ripple must be higher than the current ripple which is caused by resistive losses in the motor in order to give best microstepping results. this will allow the chopper to precisely regulate the current b oth for rising and for falling target current. the time required to introduce the current ripple into the motor coil also reduces the chopper frequency. therefore, a higher hysteresis setting will lead to a lower chopper frequency. the motor inductance lim its the ability of the chopper to follow a changing motor current. further the duration of the on phase and the fast decay must be longer than the blanking time, because the current comparator is disabled during blanking. it is easiest to find the best s etting by starting from a low hysteresis setting (e.g. hstrt =0, hend =0) and increasing hstrt, until the motor runs smoothly at low velocity settings. this can best be parameter description setting comment toff sets the slow decay time ( off time ). this setting also limits the maximum chopper frequency. for operation with stealthchop, this parameter is n ot used, but it is required to enable the motor. in case of operation with stealthchop only, any setting is ok. setting this parameter to zero completely disables all driver transistors and the motor can free - wheel. 0 chopper off 115 clk = 12 + 32* toff (1 will work with minimum blank time of 24 clocks) tbl selects the comparator blank time . this time needs to safely cover the switching event and the duration of the ringing on the sense resistor. for most applications, a setting of 1 or 2 is good. for highly capacitive loads, e.g. when filter networks are used, a setting of 2 or 3 will be required. 0 16 t clk 1 24 t clk 2 36 t clk 3 54 t clk chm selection of the chopper mode 0 spreadcycle 1 classic const. off time
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 59 www.trinamic.com checked when measuring the motor current either with a current probe or by probing the se nse resistor voltages (see figure 9 . 2 ). checking the sine wave shape near zero transition will show a small ledge between both half waves in case the hysteresis setting is too small. at medium velocities (i.e. 100 to 400 fullsteps per second), a too low hysteresis setting will lead to increased humming and vibration of the motor. figure 9 . 2 n o ledges in current wave with sufficient hysteresis (magenta: current a, yellow & blue: se nse resistor voltages a and b) a too high hysteresis setting will lead to reduced chopper frequency and increased chopper noise but will not yield any benefit for the wave shape. quick start for a quick start, see the quick configuration guide in chapter 18 . for detail procedure see application note an00 1 - parameterization of spreadcycle as experiments show, the setting is quite independent of the motor, because higher current motors typically also have a lower coil resistanc e. therefore choosing a low to medium default value for the hysteresis (for example, effective hysteresis = 4) normally fits most applications. the setting can be optimized by experimenting with the motor: a too low setting will result in reduced microstep accuracy, while a too high setting will lead to more chopper noise and motor power dissipation. when measuring the sense resistor voltage in motor standstill at a medium coil current with an oscilloscope, a too low setting shows a fast decay phase not lon ger than the blanking time. when the fast decay time becomes slightly longer than the blanking time, the setting is optimum. you can reduce the off - time setting, if this is hard to reach. the hysteresis principle could in some cases lead to the chopper fr equency becoming too low, e.g. when the coil resistance is high when compared to the supply voltage. this is avoided by splitting the hysteresis setting into a start setting ( hstrt+hend ) and an end setting ( hend ). an automatic hysteresis decrementer (hdec) interpolates between both settings, by decrementing the hysteresis value stepwise each 16 system clocks. at the beginning of each chopper cycle, the hysteresis begins with a value which is the sum of the start and the end values ( hstrt + hend ), and decremen ts during the cycle, until either the chopper cycle ends or the hysteresis end value ( hend ) is reached. this way, the chopper frequency is stabilized at high amplitudes and low supply voltage situations, if the frequency gets too low. this avoids the frequ ency reaching the audible range.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 60 www.trinamic.com f igure 9 . 3 spreadcycle chopper scheme showing coil current during a chopper cycle two parameters control spreadcycle mode: parameter description setting comment hstrt hysteresis start setting. this value is an offset from the hysteresis end value hend . 07 hstrt =18 hend hysteresis end setting. sets the hysteresis end value after a number of decrements. the sum hstrt + hend must be 02 3 415 112: positive hend example: in the example a hysteresis of 4 has been chosen. you might decide to not use hysteresis decrement. in this case set: hend =6 (sets an effective end value of 6 - 3=3) hstrt =0 (sets minimum hysteresis, i.e. 1: 3+1=4 ) in order to take advantage o f the variable hysteresis, we can set most of the value to the hstrt, i.e. 4, and the remaining 1 to hysteresis end. the resulting configuration register values are as follows: hend =0 (sets an effective end value of - 3) hstrt =6 (sets an effective start value of hysteresis end +7: 7 - 3=4) hint highest motor velocities sometimes benefit from setting toff to 1 , 2 or 3 and a short tbl of 1 or 0. t i t a r g e t c u r r e n t t a r g e t c u r r e n t - h y s t e r e s i s s t a r t t a r g e t c u r r e n t + h y s t e r e s i s s t a r t o n s d f d s d t a r g e t c u r r e n t + h y s t e r e s i s e n d t a r g e t c u r r e n t - h y s t e r e s i s e n d h d e c
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 61 www.trinamic.com 9.2 classic constant off time chopper the classic constant off time chopper is an alternative to spreadcycle. perfec tly tuned, it also gives good results. also, the classic constant off time chopper (automatically) is used in combination with fullstepping in dcstep operation. the classic constant off - time chopper uses a fixed - time fast decay following each on phas e. wh ile the duration of the on - phase is determined by the chopper comparator, the fast decay time needs to be long enough for the driver to follow the falling slope of the sine wave, but it should not be so long that it causes excess motor current ripple and p ower dissipation. this can be tuned using an oscilloscope or evaluating motor smoothness at different velocities. a good starting value is a fast decay time setting similar to the slow decay time setting. f igure 9 . 4 classic const. off time chopper with offset showing coil current after tuning the fast decay time, the offset should be tuned for a smooth zero crossing. this is necessary because the fast decay phase makes the absolut e value of the motor current lower than the target current (see f igure 9 . 5 ). if the zero offset is too low, the motor stands still for a short moment during current zero crossing. if it is set too high, it makes a larger microstep . typically, a positive offset setting is required for smoothest operation. f igure 9 . 5 zero crossing with classic chopper and correction using sine wave offset three parameters c ontrol constant off - time mode: t i m e a n v a l u e = t a r g e t c u r r e n t t a r g e t c u r r e n t + o f f s e t o n s d f d s d o n f d t i t a r g e t c u r r e n t c o i l c u r r e n t t i t a r g e t c u r r e n t c o i l c u r r e n t c o i l c u r r e n t d o e s n o t h a v e o p t i m u m s h a p e t a r g e t c u r r e n t c o r r e c t e d f o r o p t i m u m s h a p e o f c o i l c u r r e n t
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 62 www.trinamic.com parameter description setting comment tfd ( fd3 & hstrt ) fast decay time setting. with chm=1, these bits control the portion of fast decay for each chopper cycle. 0 slow decay only 115 offse t ( hend ) sine wave offset . with chm=1, these bits control the sine wave offset. a positive offset corrects for zero crossing error. 02 3 415 positive offset 112 disfdcc selects usage of the current comparator f or termination of the fast decay cycle. if current comparator is enabled, it terminates the fast decay cycle in case the current reaches a higher negative value than the actual positive value. 0 enable comparator termination of fast decay cycle 1 end by time only 9.3 random off time in the constant off - time chopper mode, both coil choppers run freely without synchronization. the frequency of each chopper mainly depends on the coil current and the motor coil inductance. the inductance varies with the micro step position. with some motors, a slightly audible beat can occur between the chopper frequencies when they are close together. this typically occurs at a few microstep positions within each quarter wave. this effect is usually not audible when compared t o mechanical noise generated by ball bearings, etc. another factor which can cause a similar effect is a poor layout of the sense resistor gnd connections. hint a common factor, which can cause motor noise, is a bad pcb layout causing coupling of both sen se resistor voltages (please refer layouts hint in chapter 24 ). to minimize the effect of a beat between both chopper frequencies, an internal random generator is provided. it modulates the slow decay time sett ing when switched on by the rndtf bit. the rndtf feature further spreads the chopper spectrum, reducing electromagnetic emission on single frequencies. parameter description setting comment rndtf this bit switches on a random off time generator, which sl ightly modulates the off time toff using a random polynomial. 0 disable 1 random modulation enable
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 63 www.trinamic.com 10 driver diagnostic flags the tmc5 07 2 drivers supply a complete set of diagnostic and protection capabilities, like short to gnd protection and undervol tage detection. a detection of an open load condition allows testing if a motor coil connection is interrupted. see the drv_status table for details. 10.1 temperature measurement the driver integrates a two level temperature sensor (120c pre - warning and 150 c thermal shutdown) for diagnostics and for protection of t he ic against excess heat. h eat is mainly generated by the motor driver stages, and, at increased voltage, by the internal voltage regulator. most critical situations, where the driver mosfets coul d be overheated, are avoided when enabling the short to gnd protection. for many applications, the overtemperature pre - warning will indicate an abnormal operation situation and can be used to initiate user warning or power reduction measures like motor cur rent reduction. the thermal shutdown is just an emergency measure and temperature rising to the shutdown level should be prevented by design. after triggering the over temperature sensor ( ot flag), the driver remains switched off until the system temperat ure falls below the pre - warning level ( otpw ) to avoid continuous heating to the shut down level. 10.2 short to gnd protection the tmc5 07 2 power stages are protected against a short circuit condition by an additional measure - ment of the current flowing through the high - side mosfets. this is important, as most short circuit conditions result from a motor cable insulation defect, e.g. when touching the conducting parts connected to the system ground. the short detection is protected against spurious triggering, e. g. by esd discharges, by retrying three times before switching off the motor. once a short condition is safely detected, the corresponding driver bridge becomes switched off, and the s2g a or s2gb flag becomes set. in order to restart the motor, the user must intervene by disabling and re - enabling the driver. it should be noted, that the short to gnd protection cannot protect the system and the power stages for all possible short events, as a short event is rather undefined and a complex network of externa l components may be involved. therefore, short circuits should basically be avoided. 10.3 open load diagnostics interrupted cables are a common cause for systems failing, e.g. when connectors are not firmly plugged. the tmc5 07 2 detects open load conditions by checking, if it can reach the desired motor coil current. this way, also undervoltage conditions, high motor velocity settings or short and overtemperature conditions may cause triggering of the open load flag, and inform the user, that motor torque may su ffer. in motor stand still, open load cannot be measured, as the coils might eventually have zero current. in order to safely detect an interrupted coil connection, read out the open load flags at low or nominal motor velocity operation, only. however, t he ol a and olb flags have just informative character and do not cause any action of the driver.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 64 www.trinamic.com 11 ramp generator the ramp generator allows motion based on target position or target velocity. it automatically calculates the optimum motion profile taking int o account acceleration and velocity settings. the tmc5 07 2 integrates a new type of ramp generator, which offers faster machine operation compared to the classical linear acceleration ramps. the sixpoint ramp generator allows adapting the acceleration ramps to the torque curves of a stepper motor and uses two different acceleration settings each for the acceleration phase and for the deceleration phase. see f igure 11 . 2 . 11.1 real world unit conversion the tmc5 07 2 uses it s internal or external clock signal as a time reference for all internal operations. thus, all time, velocity and acceleration settings are referenced to f clk . for best stability and reproducibility, it is recommended to use an external quartz oscillator a s a time base, or to provide a clock signal from a microcontroller. the units of a tmc5 07 2 register co ntent are written as register[507 2]. p arameter vs . u nits parameter / symbol unit calculation / description / comment f clk [hz] [hz] clock frequency of the tmc5 07 2 in [hz] s [s] second us step fs fullstep step velocity v[hz] steps / s v[hz] = v[5 07 2] * ( f clk [hz]/2 / 2^23 ) step acceleration a[hz/s] steps / s^2 a[hz/s] = a[5 07 2] * f clk [hz]^2 / (512*256) / 2^24 usc microstep count counts micr ostep resolution in number of microsteps (i.e. the number of microsteps between two fullsteps C chopconf option mres =%0001 will double the motor velocity for the same speed setting and thus also double effective acceleration and deceleration. the motor will have half position resolution with this setting. quick start for a quick start, s ee the quick configuration guide in chapter 18 .
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 65 www.trinamic.com 11.2 motion profiles for the ramp generator register set, please refer to the chapter 6.2 . 11.2.1 ramp mode the ramp generator delivers two phase acceleratio n and two phase deceleration ramps with additional programmable start and stop velocities (see f igure 11 . 1 ). the two different sets of acceleration and deceleration can be combined fr eely . a common transition speed v1 all ows for velocity dependent switching between both acceleration and deceleration settings . a typical use case will use lower acceleration and deceleration values at h igher velocities, as the motors torque declines at higher velocity. when considering fricti on in the system, it becomes clear, that typically deceleration of the system is quicker than acceleration. thus, deceleration values can be higher in many applications. this way, operation speed of the motor in time critical applications can be maximized. as target positions and ramp parameters may be changed any time during the motion, the motion controller will always use the optimum (fastest) way to reach the target, while sticking to the constraints set by the user. this way it might happen, that the motion becomes automatically stopped, crosses zero and drives back again. this case is flagged by the special flag second_move. 11.2.2 start and stop velocity when using increased levels of start - and stop velocity, it becomes clear, that a subsequent move into the opposite direction would provide a jerk identical to vstart + vstop , rather than only vstart . as the motor probably is not able to follow this, you can set a time delay for a subsequent move by setting tzerowait . an active delay time is flagged by the fl ag t_zerowait_active . once the target position is reached, the flag pos ition _reached becomes active. f igure 11 . 1 ramp generator velocity trace showing consequent move in negative direction note the start velocity can be set to ze ro, if n ot used. t he stop v elocity can be set to ten (or down to one) , if not used. take care to always set vstop identical to or above vstart . this ensures that even a short motion can be terminated successfully at the target position. v t a c c e l e r a t i o n p h a s e d e c e l e r a t i o n p h a s e m o t o r s t o p v s t o p v s t a r t 0 v 1 v m a x a m a x d m a x d 1 a 1 - a 1 t z e r o w a i t a c c e l e r a t i o n p h a s e v a c t u a l
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 66 www.trinamic.com f igure 11 . 2 illustration of optimized motor torque usage with tmc5 07 2 ramp generator 11.2.3 velocity mode for the ease of use, velocity mode movements do not use the differe nt acceleration and deceleration settings. you need to set vmax and amax only for velocity mode. the ramp generator always uses amax to accelerate or decelerate to vmax in this mode. in order to decelerate the motor to stand still, it is sufficient to se t vmax to zero. the flag vzero signals standstill of the motor. the flag velocity_reached always signals, that the target velocity has been reached. 11.2.4 early ramp termination in cases where users can interact with a system, some applications require termina ting a motion by ramping down to zero velocity before the target position has been reached. o ptions to t erminate m otion using a cceleration s ettings : a) switch to velocity mode, set vmax =0 and amax to the desired deceleration value. this will stop the motor using a linear ramp. b) for a stop in positioning mode, set vstart =0 and vmax =0. vstop is not used in this case. the driver will use amax and a1 (as determined by v1 ) for going to zero velocity. c) for a stop using d1 , dmax and vstop , trigger the deceleration phase by copying xactual to xtarget . set tzerowait sufficiently to allow the cpu to interact during this time . the driver will decelerate and eventually come to a stop. poll the actual velocity to terminate motion during tzerowait time using option a) or b). d) activate a stop switch. this can be done by means of the hardware input, e.g. using a wired 'or' to the ref switch input. if you do not use the hardware input and have tied the refl and refr to a fixed level, enable the stop function ( stop_l_enable , st op_r_enable ) and use the inverting function ( pol_stop_l , pol_stop_r ) to simulate the switch activation. 11.2.5 application example: joystick control applications like surveillance cameras can be optimally enhanced using the motion controller: while joystick comm ands operate the motor at a user defined velocity, the target ramp generator ensures that the valid motion range never is left. t o r q u e f o r v s t a r t t o r q u e a v a i l a b l e f o r a m a x t o r q u e a v a i l a b l e f o r a c c e l e r a t i o n a 1 t o r q u e r e q u i r e d f o r s t a t i c l o a d s t o r q u e v e l o c i t y [ r p m ] 0 m f r i c t m m a x v m a x m f r i c t p o r t i o n o f t o r q u e r e q u i r e d f o r f r i c t i o n a n d s t a t i c l o a d w i t h i n t h e s y s t e m m m a x m o t o r p u l l - o u t t o r q u e a t v = 0 m o t o r t o r q u e m n o m 2 h i g h a c c e l e r a t i o n r e d u c e d a c c e l . v 1 m n o m 1 m n o m 1 / 2 t o r q u e a v a i l a b l e a t v 1 r e s p . v m a x m o t o r t o r q u e u s e d i n a c c e l e r a t i o n p h a s e h i g h d e c e l e r a t i o n r e d u c e d d e c e l . 2 x m f r i c t o v e r a l l t o r q u e u s a b l e f o r d e c e l e r a t i o n v s t a r t
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 67 www.trinamic.com r ealize j oystick c ontrol 1. use positioning mode in order to control the motion direction and to set the motion limit(s). 2. modify vmax at any time in the range vstart to your maximum value. with vstart =0, you can also stop motion by setting vmax =0. the motion controller will use a1 and amax as determined by v1 to adapt velocity for ramping up and ramping down. 3. in case you do not mod ify the acceleration settings, you do not need to rewrite xtarget , just modify vmax . 4. dmax, d1 and vstop only become used when the ramp controller slows down due to reaching the target position, or when the target position has been modified to point to the other direction. 11.3 interrupt handling the motion controller s provide the capability to issue an interru pt to the microcontroll er, e .g. in order to react on a position reached event. in case more than one interrupt source is possible, it is necessary to carefully check for the actual event , without riskin g losing an event. i nterrupt handling fo r 2 a xis (e xample for target _ reached ) : 1. read ramp_stat1 to clear the interrupt flags. this will turn off the in terrupt source . 2. c heck x actual1 for reaching of the target position (and any other conditions you want to check for ramp 1 ). 3. d o the same for ramp_stat2 and x actual2 . this way, you are sure that you will not miss an y target_reached condition , because you first clear the flags, and afterwards read out the condition. 11.4 velocity thresholds the ramp generator provides a number of velocity thresholds coupled to the actual velocity vactual . the different ranges allow programming the motor to the optimum step mode, coil cur rent and acceleration settings. fo r the range labeled microstepping in f igure 11 . 3 , either stealthchop or spreadcycle can be used, if enabled. f igure 11 . 3 ramp generator velocity depen dent motor control h i g h v e l o c i t y f u l l s t e p m i c r o s t e p + c o o l s t e p m i c r o s t e p + c o o l s t e p m i c r o s t e p p i n g m i c r o s t e p p i n g m o t o r s t a n d s t i l l m o t o r g o i n g t o s t a n d b y m o t o r i n s t a n d b y m o t o r i n s t a n d b y v t v s t o p v s t a r t 0 v 1 v m a x a m a x d m a x d 1 a 1 v a c t u a l v c o o l t h r s v h i g h c u r r e n t t z e r o w a i t r m s c u r r e n t i _ h o l d i _ r u n d i * i h o l d d e l a y c o o l s t e p c u r r e n t r e d u c t i o n
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 68 www.trinamic.com note since it is not necessary to differentiate the velocity to the last detail, the velocity thresholds use a reduced number of bits for comparison and the lower eight bits of the compare values become ignored. 11.5 reference switches pri or to normal operation of the drive an absolute reference position must be set . the reference position can be found using a mechanical stop which can be detected by stall detection, or by a reference switch. in case of a linear drive, the mechanical moti on range must not be left. this can be ensured also for abnormal situations by enabling the stop switch functions for the left and the right reference switch. therefore, the ramp generator responds to a number of stop events as configured in the sw_mode re gister. there are two ways to stop the motor: - it can be stopped abruptly, when a switch is hit . this is useful in an eme rgency case and for stallguard based homing. - o r the motor can be softly decelerated to zero using deceleration settings (dmax, v1, d1) . hint l atching of the ramp position xactual to the holding register xlatch upon a switch event gives a precise snapshot of the position of the reference switch. f igure 11 . 4 usin g reference switches (example) normally o pen or normally closed switches can be used by programming the switch polarity or selecting the pull - up or pull - down resistor configuration. a normally closed switch is failsafe with respect to an interrupt of the s witch connection. switches which can be used are: - mechanical switches, - photo interrupters , or - hall sensors. be careful to select reference switch resistors matching you r switch requirements! in case of long cables additional rc filtering might be requ ired near the tmc5 07 2 reference inputs. adding an rc filter will also reduce the danger of destroying the logic level inputs by wiring faults, but it will add a certain delay which should be considered with respect to the application. + v c c _ i o r e f l t r a v e l e r m o t o r + v c c _ i o r e f r n e g a t i v e d i r e c t i o n p o s i t i v e d i r e c t i o n 1 0 k 1 0 k 2 2 k 1 n f o p t i o n a l r c f i l t e r ( e x a m p l e )
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 69 www.trinamic.com i mplementing a h o ming p rocedure 1. make sure, that the home switch is not pressed, e.g. by moving away from the switch. 2. activate position latching upon the desired switch event and activate motor (soft) stop upon active switch. stallguard based homing requires using a hard s top ( en_softstop =0). 3. start a motion ramp into the direction of the switch. (move to a more negative position for a left switch, to a more positive position for a right switch). you may timeout this motion by using a position ramping command. 4. as soon as the switch is hit, the position becomes latched and the motor is stopped. wait until the motor is in standstill again by polling the actual velocity v actual or checking vzero or the standstill flag. please be aware that reading ramp_stat may clear flags (e.g. sg_stop ) and thus the motor may restart after expiration of tzerowait . in case the stop condition might be reset by the read and clear (r+c) function, be sure to execute step 5 within the time range set by tzerowait . 5. switch the ramp generator to hold mode and calculate the difference between the latched position and the actual position. for stallguard based homing or when using hard stop, xactual stops exactly at the home position, so there is no difference (0). 6. write the calculated difference into the act ual position register. now, homing is finished. a move to position 0 will bring back the motor exactly to the switching point. in case stallguard was used for homing, a read access to ramp_stat clears the stallguard stop event event_stop_sg and releases th e motor from the stop condition.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 70 www.trinamic.com 12 stallguard2 load measurement stallguard2 provides an accurate measurement of the load on the motor. it can be used for stall detection as well as other uses at loads below those which stall the motor, such as coolstep lo ad - adaptive current reduction. the stallguard2 measurement value changes linearly over a wide range of load, velocity, and current settings, as shown in f igure 12 . 1 . at maximum motor load, the value goes to zero or near to zero. t his corresponds to a load angle of 90 between the magnetic field of the coils and magnets in the rotor. this also is the most energy - efficient point of operation for the motor. f igure 12 . 1 function principle of stallguard2 parameter description setting comment sgt this signed value controls the stallguard2 threshold level for stall detection and sets the optimum measurement range for readout. a lower value gives a higher sensitiv ity. zero is the starting value working with most motors. a higher value makes stallguard2 less sensitive and requires more torque to indicate a stall. 0 indifferent value +1 +63 less sensitivity - 1 - 64 higher sensitivity sfilt enables the stallgu ard2 filter for more precision of the measurement. if set, reduces the measurement frequency to one measurement per electrical period of the motor (4 fullsteps). 0 standard mode 1 filtered mode status word description range comment sg this is the stal lguard2 result . a higher reading indicates less mechanical load. a lower reading indicates a higher load and thus a higher load angle. tune the sgt setting to show a sg reading of roughly 0 to 100 at maximum load before motor stall. 0 1023 0: highest load low value: high load high value: less load attention in order to use stallguard2 and coolstep, the stallguard 2 sensitivity should first be tuned using the sgt setting! m o t o r l o a d ( % m a x . t o r q u e ) s t a l l g u a r d 2 r e a d i n g 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 1 0 0 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 1 0 0 s t a r t v a l u e d e p e n d s o n m o t o r a n d o p e r a t i n g c o n d i t i o n s m o t o r s t a l l s a b o v e t h i s p o i n t . l o a d a n g l e e x c e e d s 9 0 a n d a v a i l a b l e t o r q u e s i n k s . s t a l l g u a r d v a l u e r e a c h e s z e r o a n d i n d i c a t e s d a n g e r o f s t a l l . t h i s p o i n t i s s e t b y s t a l l g u a r d t h r e s h o l d v a l u e s g t .
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 71 www.trinamic.com 12.1 tuning stallguard2 threshold sgt the stallguard2 value sg is affected by motor - spec ific characteristics and application - specific demands on load and velocity. therefore the easiest way to tune the stallguard2 threshold sgt for a specific motor type and operating conditions is interactive tuning in the actual application. i nitial procedu re for tuning stall g uard sgt 1. operate the motor at the normal operation velocity for your application and monitor sg . 2. apply slowly increasing mechanical load to the motor. if the motor stalls before sg reaches zero, decrease sgt . if sg reaches zero before t he motor stalls, increase sgt . a good sgt starting value is zero. sgt is signed, so it can have negative or positive values. 3. now enable sg_stop and make sure, that the motor is safely stopped whenever it is stalled. increase sgt if the motor becomes stoppe d before a stall occurs. restart the motor by disabling sg_stop or by reading the ramp_stat register (read and clear function). 4. the optimum setting is reached when sg is between 0 and roughly 100 at increasing load shortly before the motor stalls, and sg i ncreases by 100 or more without load. sgt in most cases can be tuned for a certain motion velocity or a velocity range. make sure, that the setting works reliable in a certain range (e.g. 80% to 120% of desired velocity) and also under extreme motor condit ions (lowest and highest applicable temperature). o ptional procedure a llowing automatic tu ning of sgt the basic idea behind the sgt setting is a factor, which compensates the stallguard measurement for resistive losses inside the motor. at standstill and v ery low velocities, resistive losses are the main factor for the balance of energy in the motor, because mechanical power is zero or near to zero. this way, sgt can be set to an optimum at near zero velocity. this algorithm is especially useful for tuning sgt within the application to give the best result independent of environment conditions, motor stray, etc. 1. operate the motor at low velocity < 10 rpm (i.e. a few to a few fullsteps per second) and target operation current and supply voltage. in this vel ocity range, there is not much dependence of sg on the motor load, because the motor does not generate significant back emf. therefore, mechanical load will not make a big difference on the result. 2. switch on s filt . now increase sgt starting from 0 to a va lue, where sg starts rising. with a high sgt , sg will rise up to the maximum value. reduce again to the highest value, where sg stays at 0. now the sgt value is set as sensibly as possible. when you see sg increasing at higher velocities, there will be use ful stall detection. the upper velocity for the stall detection with this setting is determined by the velocity, where the motor back emf approaches the supply voltage and the motor current starts dropping when further increasing velocity. sg goes to ze ro when the motor stalls and the ramp generator can be programmed to stop the motor upon a stall event by enabling sg_stop in sw_mode . set vcoo l thrs to match the lower velocity threshold where stallguard delivers a good result in order to use sg_stop . th e system clock frequency affects sg . an external crystal - stabilized clock should be used for applications that demand the highest performance. the power supply voltage also affects sg , so tighter regulation results in more accurate values. sg measurement h as a high resolution, and there are a few ways to enhance its accuracy, as described in the following sections. quick start for a quick start, see the quick configuration guide in chapter 18 . for detail procedure see applicati on note an002 - parameterization of stallguard2 & coolstep
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 72 www.trinamic.com 12.1.1 variable velocity limits vcoolthrs and vhigh the sgt setting chosen as a result of the previously described sgt tuning can be used for a certain velocity range. outside this range, a stall may n ot be detected safely, and coolstep might not give the optimum result. f igure 12 . 2 example: optimum sgt setting and stallguard2 reading with an example motor in many application s, operation at or near a single operation point is used most of the time and a single setting is sufficient. the ramp generator provides a lower ( vcoolthrs ) and an upper velocity threshold ( vhigh ) to match this. the stall detection is automatically disabl ed outside the determined operation point, e.g. during acceleration phases preceding a sensorless homing procedure when setting vcoolthrs to a matching value. an upper limit can be specified by v high . in some applications, a velocity dependent tuning of t he sgt value can be expedient, using a small number of support points and linear interpolation. 12.1.2 small motors with high torque ripple and resonance motors with a high detent torque show an increased variation of the stallguard2 measurement value sg with v arying motor currents, especially at low currents. for these motors, the current dependency should be checked for best result. 12.1.3 temperature dependence of motor coil resistance motors working over a wide temperature range may require temperature correction , because motor coil resistance increases with rising temperature. this can be corrected as a linear reduction of sg at increasing temperature, as motor efficiency is reduced. 12.1.4 accuracy and reproducibility of stallguard2 measurement in a production environ ment, it may be desirable to use a fixed sgt value within an application for one motor type. most of the unit - to - unit variation in stallguard2 measurements results from manu - facturing tolerances in motor construction. the measurement error of stallguard2 C provided that all other parameters remain stable C can be as low as: ?????????? ??????????? ????? = ??? ( 1 , | ??? | ) b a c k e m f r e a c h e s s u p p l y v o l t a g e o p t i m u m s g t s e t t i n g m o t o r r p m ( 2 0 0 f s m o t o r ) s t a l l g u a r d 2 r e a d i n g a t n o l o a d 2 4 6 8 1 0 1 2 1 4 1 6 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 1 0 0 0 1 8 2 0 0 0 5 0 1 0 0 1 5 0 2 0 0 2 5 0 3 0 0 3 5 0 4 0 0 4 5 0 5 0 0 5 5 0 6 0 0 l o w e r l i m i t f o r s t a l l d e t e c t i o n g o o d o p e r a t i o n r a n g e w i t h s i n g l e s g t s e t t i n g
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 73 www.trinamic.com 12.2 stallguard2 update rate and filter the stallguard2 measurement value sg is updated with each full step of the motor. this is enough to safely detect a stall, because a stall always means the loss of four full steps. in a practical application, especially when using coolstep, a more precise measurement might be more important than an update for each fullstep be cause the mechanical load never changes instantaneously from one step to the next. for these applications, the sfilt bit enables a filtering function over four load measurements . the filter should always be enabled when high - precision measurement is requir ed. it compensates for variations in motor construction, for example due to misalignment of the phase a to phase b magnets. the filter should be disabled when rapid response to increasing load is required and for best results of sensorless homing using sta llguard . 12.3 detecting a motor stall for best stall detection, work without stallguard filtering ( sfilt =0). t o safely detect a motor stall the stall threshold must be determined using a specific sgt setting. therefore, the maximum load needs to be determined, which the motor can drive without stalling . at the same time, monitor the sg value at this load, e.g. some value within the range 0 to 100. the stall threshold should be a value safely within the operating limits, to allow for parameter stray. the respons e at an sgt setting at or near 0 gives some idea on the quality of the signal: check the sg value without load and with maximum load. they should show a difference of at least 100 or a few 100, which shall be large compared to the offset. if you set the sg t value in a way, that a reading of 0 occurs at maximum motor load, the stall can be automatically detected by the motion controller to issue a motor stop. in the moment of the step resulting in a step loss, the lowest reading will be visible. after the st ep loss, the motor will vibrate and show a higher sg reading. 12.4 homing with stallguard the homing of a linear drive requires moving the motor into the direction of a hard stop. as stallguard needs a certain velocity to work (as set by tcoolthrs ), make sure t hat the start point is far enough away from the hard stop to provide the distance required for the acceleration phase. after setting up sgt and the ramp generator registers, start a motion into the direction of the hard stop and activate the stop on stall function (set sg_stop in sw_mode ). once a stall is detected, the ramp generator stops motion and sets v actual zero, stopping the motor. the stop condition also is indicated by the flag stallguard in drv_status . after setting up new motion parameters in ord er to prevent the motor from restarting right away, stallguard can be disabled, or the motor can be re - enabled by reading ramp_stat . the read and clear function of the event_stop_sg flag in ramp_stat would restart the motor after t zerowait in case the moti on parameters have not been modified. 12.5 limits of stallguard2 operation stallguard2 does not operate reliably at extreme motor velocities: very low motor velocities (for many motors, less than one revolution per second) generate a low back emf and make the measurement unstable and dependent on environment conditions (temperature, etc.). the automatic tuning procedure described above will compensate for this. other conditions will also lead to extreme settings of sgt and poor response of the measurement value sg to the motor load. very high motor velocities, in which the full sinusoidal current is not driven into the motor coils also leads to poor response. these velocities are typically characterized by the motor back emf reaching the supply voltage.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 74 www.trinamic.com 13 coolst ep operation coolstep is an automatic smart energy optimization for stepper motors based on the motor mechanical load, making them green. 13.1 user benefits coolstep allows substantial energy savings, especially for motors which see varying loads or operate at a high duty cycle. because a stepper motor applic ation needs to work with a torque reserve of 30% to 50%, even a constant - load application allows significant energy savings because coolstep automatically enables torque reserve when required. reducing power consumption keeps the system cooler, increases m otor life, and allows reducing cost in the power supply and cooling components. reducing motor current by half results in reducing power by a factor of four. 13.2 setting up for coolstep coolstep is controlled by several parameters, but two are critical for understanding how it works: parameter description range comment semin 4 - bit unsigned integer that sets a lower threshold . if sg goes below this threshold, coolstep increases the current to both coils. the 4 - bit semin value is scaled by 32 to cover th e lower half of the range of the 10 - bit sg value. (the name of this parameter is derived from smartenergy, which is an earlier name for coolstep.) 0 disable coolstep 115 semin *32 semax 4 - bit unsigned integer that controls an upper thresho ld . if sg is sampled equal to or above this threshold enough times, coolstep decreases the current to both coils. the upper threshold is ( semin + semax + 1)*32. 015 semin + semax +1)*32 f igure 13 . 1 s hows t he operating regions of coolstep : - the black line represents the sg measurement value. - t he blue line represents the mecha nical load applied to the motor. - the red line represents the current into the motor coils. when the load increases, sg falls below semin , and coolstep increases the current. when the load decreases, sg rises above ( semin + semax + 1) * 32, and the current is reduced. energy efficiency C motor generates less heat C less cooling infrastructure C cheaper motor C
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 75 www.trinamic.com f igure 13 . 1 coolstep adapts motor cu rrent to the load five more parameters control coolstep and one status value is returned: parameter description range comment seup sets the current increment step . the current becomes incremented for each measured stallguard2 value below the lower thres hold. 03 sedn sets the number of stallguard 2 readings above the upper threshold necessary for each current decrement of the motor current. 03 seimin sets the lower motor current limit for coolstep operation by scaling the irun current setting. 0 0: 1/2 of irun 1 1: 1/4 of irun vcool thrs lower ramp generator velocity threshold. below this velocity coolstep becomes disabled (not used in step/dir mode). adapt to the lower limit of the velocity range where stallguard2 gives a stable result. hint: may be adapted to disable coolstep during acceleration and deceleration phase by setting identical to vmax . 1 vhigh upper ramp generator velocity threshold value . above this velocity coolstep becomes disabled (not used in step/dir mode). adapt to the velocity range where stallguard2 gives a stable result. 1 status word description range comm ent csactual this status value provides the actual motor current scale as controlled by coolstep. the value goes up to the irun value and down to the portion of irun as specified by seimin . 031 1/32, 2/32, 32/32 s t a l l g u a r d 2 r e a d i n g 0 = m a x i m u m l o a d m o t o r c u r r e n t i n c r e m e n t a r e a m o t o r c u r r e n t r e d u c t i o n a r e a s t a l l p o s s i b l e s e m i n s e m a x + s e m i n + 1 z e i t m o t o r c u r r e n t c u r r e n t s e t t i n g i _ r u n ( u p p e r l i m i t ) ? o r ? i _ r u n ( l o w e r l i m i t ) m e c h a n i c a l l o a d c u r r e n t i n c r e m e n t d u e t o i n c r e a s e d l o a d s l o w c u r r e n t r e d u c t i o n d u e t o r e d u c e d m o t o r l o a d l o a d a n g l e o p t i m i z e d l o a d a n g l e o p t i m i z e d l o a d a n g l e o p t i m i z e d
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 76 www.trinamic.com 13.3 tuning coolstep before tuning coolst ep, first tune the stallguard2 threshold level sgt , which affects the range of the load measurement value sg . coolstep uses sg to operate the motor near the optimum load angle of +90. the current increment speed is specified in seup , and the current decr ement speed is specified in sedn . they can be tuned separately because they are triggered by different events that may need different responses. the encodings for these parameters allow the coil currents to be increased much more quickly than decreased, be cause crossing the lower threshold is a more serious event that may require a faster response. if the response is too slow, the motor may stall. in contrast, a slow response to crossing the upper threshold does not risk anything more serious than missing a n opportunity to save power. coolstep operates between limits controlled by the current scale parameter irun and the seimin bit. 13.3.1 response time for fast response to increasing motor load, use a high current increment step seup . if the motor load changes s lowly, a lower current increment step can be used to avoid motor oscillations. if the filter controlled by sfilt is enabled, the measurement rate and regulation speed are cut by a factor of four. hint the most common and most beneficial use is to adapt c oolstep for operation at the typical system target operation velocity and to set the velocity thresholds according. as acceleration and decelerations normally shall be quick, they will require the full motor current, while they have only a small contributi on to overall power consumption due to their short duration. 13.3.2 low velocity and s tandby o peration because coolstep is not able to measure the motor load in standstill and at very low rpm, a lower velocity threshold is provided in the ramp generator. it shou ld be set to an application specific default value. below this threshold the normal current setting via irun respectively ihold is valid. an upper threshold is provided by the vhigh setting. both thresholds can be set as a result of the stallguard2 tuning process.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 77 www.trinamic.com 14 dcstep dcstep is an automatic commutation mode for the stepper motor. it allows the stepper to run with its target velocity as commanded by the ramp generator as long as it can cope with the load. in case the motor becomes overloaded, it slows down to a velocity, where the motor can still drive the load. this way, the stepper motor never stalls and can drive heavy loads as fast as possible. its higher torque available at lower velocity, plus dynamic torque from its flywheel mass allow compensati ng for mechanical torque peaks. in case the motor becomes completely blocked, the stall flag becomes set. 14.1 user benefits 14.2 designing - in dcstep in a classical application, the operation area is limited by the maximum torque required at maximum application velocity. a safety margin of up to 50% torque is required , in order to compensate for unforeseen load peaks, torque loss due to resonance and aging of mechanical components. dcstep allows using up to the full available motor torque. even higher short time dynamic loads can be overcome using motor and application flywheel mass without the danger of a motor stall. with dcstep the nominal application load can be extended to a higher torque only limited by the safety margin near the holding torque area (which is the highest torque the motor can provide). additionally , maximum application velocity can be increased up to the actually reachable motor velocity. f igure 14 . 1 dcstep extended application operation area quick start for a quick start , see the quick configuration guide in chapter 18 . for detail configuration procedure see application note an003 - dcstep motor C never loses steps application C works as fast as possible acceleration C automatically as high as possible energy efficienc y C highest at speed limit cheaper motor C does the job! c l a s s i c o p e r a t i o n a r e a w i t h s a f e t y m a r g i n t o r q u e v e l o c i t y [ r p m ] d c s t e p o p e r a t i o n - n o s t e p l o s s c a n o c c u r a d d i t i o n a l f l y w h e e l m a s s t o r q u e r e s e r v e m i c r o s t e p o p e r a t i o n 0 m n o m 1 m m a x v d c m i n v m a x m n o m : n o m i n a l t o r q u e r e q u i r e d b y a p p l i c a t i o n m m a x : m o t o r p u l l - o u t t o r q u e a t v = 0 a p p l i c a t i o n a r e a m a x . m o t o r t o r q u e s a f e t y m a r g i n d c s t e p e x t e n d e d s a f e t y m a r g i n : c l a s s i c a l a p p l i c a t i o n o p e r a t i o n a r e a i s l i m i t e d b y a c e r t a i n p e r c e n t a g e o f m o t o r p u l l - o u t t o r q u e m n o m 2
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 78 www.trinamic.com 14.3 enabling dcstep dcstep requires only a few settings. it directly feeds back motor motion to the ramp ge nerator, so that it becomes seamlessly integrated into the motion ramp, even if the motor becomes overloaded with respect to the target velocity. dcstep operates the motor in fullstep mode at the ramp generator target velocity vactual or at reduced velocit y if the motor becomes overloaded. it requires settin g the minimum operation velocity vdcmin . vdcmin shall be set to the lowest operating velocity where dcstep gives a reliable detection of motor operation. the motor never stalls unless it becomes braked t o a velocity below vdcmin . in case the velocity should fall below this value, the motor would restart once its load is released, unless the stall detection becomes enabled (set sg_stop ). stall detection is covered by stallguard2 . f igure 14 . 2 velocity profile with impact by overload situation attention: dcstep requires that the phase polarity of the sine wave is positive within the mscnt range 768 to 255 and negative within 256 t o 767. the cosine polarity must be positive from 0 to 511 and negative from 512 to 1023. a phase shift by 1 would disturb dcstep operation. therefore it is advised to work with the default wave. please refer chapter 15.2 for an initialization with the default table. 14.4 stall detection in dcstep mode while dcstep is able to decelerate the motor upon overload, it cannot avoid a stall in every operation situation. once the motor is blocked, or i t becomes decelerated below a motor de pendent minimum velocity where the motor operation cannot safely be detected any more , the motor may stall and loose steps. in order to safely detect a step loss and avoid restarting of the motor, the stop on stall can be enabled (set flag sg_stop ). in thi s case v actual becomes set to zero once the motor is stalled. it remains stopped until reading the ramp_stat status flags. the flag event_stop_sg shows the active stop condition. a stallguard2 load value also is available during dcstep operation. the range of values is limited to 0 to 255, in certain situations up to 511 will be read out. in order to enable stallguard, also set v coolthrs to a velocity slightly above vdcmin or up to vmax . stall detection in this mode may trigger falsely due to resonances, w hen flywheel loads are loosely coupled to the motor axis. v t d c s t e p a c t i v e v d c m i n 0 v 1 v m a x a m a x d m a x d 1 a 1 n o m i n a l r a m p p r o f i l e r a m p p r o f i l e w i t h t o r q u e o v e r l o a d a n d s a m e t a r g e t p o s i t i o n o v e r l o a d
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 79 www.trinamic.com parameter description range comment vhighfs & vhighchm these chopper configuration flags in chopconf need to be set for dcstep operation. as soon as vdcmin becomes exceeded, the chopper becomes sw itched to fullstepping. 0 / 1 set to 1 for dcstep toff dcstep often benefits from an increased off time value in chopconf . settings >2 should be preferred. 2 15 settings 815 do not make vdcmin this is t he lower threshold for dcstep operation. below this threshold, the motor operates in normal microstep mode. in dcstep operation, the motor operates at minimum vdcmin , even when it is completely blocked. tune together with dc_time setting. stealthchop is d isabled in dcstep mode above vdcmin . 0 2^22 dc_time this setting controls the reference pulse width for dcstep load measurement. it must be optimized for robust operation with maximu m motor torque. a higher value allows higher torque and higher velocity, a lower value allows operation down to a lower velocity as set by vdcmin . check best setting under nominal operation conditions, and re - check under extreme operating conditions (e.g. lowest operation supply voltage, highest motor temperature, and highest supply voltage, lowest motor temperature). 0 255 t blank (as defined by tbl ) in clock cycles + 1 dc_sg this setting controls stall detection in dcstep mode. increase for higher sensitivity. a stall can be used as an error condition by issuing a hard stop for the motor. enable sg_stop flag for stopping the motor upon a stall event. this way the motor will be stopped once it stalls. 0 255 dc_ti me / 16 14.5 measuring actual motor velocity in dcstep operation dcstep has the ability to reduce motor velocity in case the motor becomes slower than the target velocity due to mechanical load. vactual shows the ramp generator target velocity. it is not infl uenced by dcstep. measuring dcstep velocity is possible based on the position counter xactual . therefore take two snapshots of the position counter with a known time difference: ??????? ?????? = ??????? ( ???? 2 ) ? ??????? ( ? ? ?? 1 ) ???? 2 ? ???? 1 ? 2 24 ? ??? example: at 16.0 mhz clock frequency, a 0.954 second measurement delay would directly yield in the velocity value, a 9.54 ms delay would yield in 1/100 of the actual dcstep velocity. to grasp the time in terval as precisely as possible, snapshot a timer each time the transmission of xactual from the ic starts or ends. the rising edge of ncs for spi transmission provides the most exact time reference.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 80 www.trinamic.com 15 sine - wave look - up table t he tmc5 07 2 driver provides a programmable look - up table for storing the microstep current wave. it is common to both drivers. as a default, the table i s pre - programmed with a sine wave, which is a good starting point for most stepper motors. reprogramming the table to a motor specif ic wave allows drastically improved microstepping especially with low - cost motors. 15.1 user benefits 15.2 mi crostep table in order to minimize required memory and the amount of data to be programmed, only a quarter of the wave becomes stored. the internal microstep table maps the microstep wave from 0 to 90 . it becomes symmetr ically extended t o 360 . when read ing out the table the 10 - bit microstep counter mscnt addresses the fully extended wave table . the table is stored in an incremental fashion, using each one bit per entry. therefore only 256 bits ( ofs00 to ofs255 ) are required to store the quarter wave. the se bits are mapped to eight 32 bit registers. each ofs bit controls the addition of an inclination w x or w x +1 when advancing one step in the table . when wx is 0, a 1 bit in the table at the actual microstep position means add one when advancing to the ne xt microstep. as the wave can have a high er inclination than 1, the base inclinations wx can be programmed to - 1, 0, 1, or 2 using up to four flexible programmable segments within the quarter wave. this way even negative inclination can be realized. the fo ur inclination segments are controlled by the position registers x 1 to x3 . inclination segment 0 goes from microstep position 0 to x1 - 1 and its base inclination is controlled by w0 , segment 1 goes from x1 to x2 - 1 with its base inclination controlled by w1 , etc. when modifyi ng the wave, care must be taken to ensure a smooth and symmetrical zero transition when the quarter wave becomes expanded to a full wave . the maximum resulting swing of the wave should be adjusted to a range of - 248 to 248 , in order to give the best possible resolution while leaving headroom for the hysteresis based chopper to add an offset. f igure 15 . 1 lut programming example microstepping C motor C torque C m s c n t y 2 5 6 2 5 6 2 4 8 - 2 4 8 5 1 2 7 6 8 0 0 x 1 x 3 x 2 w 0 : + 2 / + 3 w 1 : + 1 / + 2 w 2 : + 0 / + 1 w 3 : - 1 / + 0 l u t s t o r e s e n t r i e s 0 t o 2 5 5 2 5 5 s t a r t _ s i n s t a r t _ s i n 9 0
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 81 www.trinamic.com when the microstep sequencer ad vances within the table, it calculates the actual current values for the motor coils with each microstep and stores them to the registers cur_a and cur_b . however the incremental coding requires an absolute initialization, especially when the microstep tab le becomes modified. therefore cur_a and cur_b become initialized whenever mscnt passes zero. two registers control the starting values of the tables: - as the starting value at zero is not necessarily 0 (it might be 1 or 2), it can be programmed into the s tarting point register start_sin . - in the same way, the start of the second wave for the second motor coil needs to be stored in start_sin90 . this register stores the resulting table entry for a phase shift of 90 for a 2 - phase motor. hint refer chapter 6.4 for the register set and for the default table function stored in the drivers. the default table is a good base for realizing an own table. the tmc507 2 - eval comes with a calculation tool for own waves. init ialization e xample for the default microstep table: mslut[0] = % 101010101010101 01011010101010100 = 0xaaaab554 mslut[1] = % 010010101001010 10101010010101010 = 0x4a9554aa mslut[2] = % 00100100010010010010100100101001 = 0x24492929 mslut[3] = % 000100000001000001000 01000100010 = 0x10104222 mslut[4] = % 1111101111111 1111111111111111111 = 0xfbffffff mslut[5] = % 10110101101110110111011101111101 = 0xb5bb777d mslut[6] = % 01001001001010010101010101010110 = 0x49295556 mslut[7] = % 00000000010000000100001000100010 = 0x00404222 ms lutsel = 0xffff8056: x1 = 128 , x2 = 255, x3 = 255 w3 =%01, w2 =%01, w1 =%01, w0 =%10 mslutstart = 0x00 f 70000 : start_sin_0 = 0, start_sin 90 = 247
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 82 www.trinamic.com 16 step/dir interface the step and dir inputs provide a simple, standard interface compatible with many existing motion contr ollers. the microplyer step pulse interpolator brings the smooth motor operation of high - resolution microstepping to applications originally designed for coarser stepping. in case an external step source is used, the complete integrated motion controller c an be switched off for one or both motors at any time. the only motion controller registers remaining active in this case are the current settings in register ihold_irun . dcstep cannot be used in this mode, as the driver has no means to feed back taken s teps to the external motion controller ! 16.1 timing f igure 16 . 1 shows the timing parameters for the step and dir signals, and the table below gives their specifications. when the dedge mode bit in the drvctrl register is set, both ed ges of step are active. if dedge is cleared, only rising edges are active. step and dir are sampled and synchronized to the system clock. an internal analog filter removes glitches on the signals, such as those caused by long pcb traces. if the signal sour ce is far from the chip, and especially if the signals are carried on cables, the signals should be filtered or differentially transmitted. f igure 16 . 1 step and dir timing , input pin filter step and dir interface timing ac - characteristics clock period is t clk parameter symbol conditions min typ max unit step frequency (at maximum microstep resolution) f step dedge =0 ? f clk dedge =1 ? f clk fullstep frequency f fs f clk /512 step input low time *) t sl max(t filtsd , t clk +20) ns step input high time *) t sh max(t filtsd , t clk +20) ns dir to step setup time t dsu 20 ns dir after step hold time t dsh 20 ns step and dir spike filtering time *) t filtsd rising and falling edge 36 60 85 ns st ep and dir sampling relative to rising clk input t sdclkhi before rising edge of clk input t filtsd ns *) these values are valid with full input logic level swing, only. asymmetric logic levels will increase filtering delay t filtsd , due to an internal input rc filter. + v c c _ i o s c h m i t t t r i g g e r 0 . 4 4 v c c _ i o 0 . 5 6 v c c _ i o 2 5 0 k 0 . 2 6 p f i n p u t f i l t e r r * c = 6 5 n s + - 3 0 % s t e p o r d i r i n p u t i n t e r n a l s i g n a l d i r s t e p t d s h t s h t s l t d s u a c t i v e e d g e ( d e d g e = 0 ) a c t i v e e d g e ( d e d g e = 0 )
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 83 www.trinamic.com 16.2 changing resolution sometimes operation of a motor in reduced microstep resolution is desired, in order to stay compatible to an older, less performi ng driver, or, when using motion controllers with limited frequency capabilities for the step/dir interface. the internal microstep table uses 1024 sine wave entries to generate the wave. the step width taken within the table depends on the microstep resol ution setting. depending on the dir input, the microstep counter is increased (dir=0) or decreased (dir=1) with each step pulse by the step width. in principle, the microstep resolution can be changed at any time. the microstep resolution determines the in crement respectively the decrement, the tmc5 07 2 uses for advancing in the microstep table. at maximum resolution, it advances one step for each step pulse. at half resolution, it advances two steps and so on. this way, a change of resolution is possible tr ansparently at each time. 16.2.1 working with half - and fullstep resolution fullstepping is desirable in some applications, where maximum torque at maximum velocity with a given motor is desired. especially at low microstep resolutions like full - or halfsteppin g, the absolute current values and thus the absolute positions in the table are important for best motor performance. thus, a software which uses resolution switching in order to get maximum torque and velocity from the drive, should switch the resolution at or near certain positions, as shown in the following table. step position mscnt value current coil a current coil b half step 0 0 0% 100% full step 0 128 70.7% 70.7% half step 1 256 100% 0% full step 1 384 70.7% - 70.7% half step 2 512 0% - 100% f ull step 2 640 - 70.7% - 70.7% half step 3 768 - 100% 0% full step 3 896 - 70.7% 70.7% t able 16 . 1 optimum position sequence for half - and full stepping 16.3 microplyer step interpolator and stand still detection fo r each active edge on step, microplyer produces 16 microsteps at 256x resolution, as shown in f igure 16 . 2 . enable microplyer by setting the intpol16 bit in the chopconf register. it only supports input at 16x setting, which it t ransforms into 256x resolution. operation is only possible in step/dir mode. the step rate for the 16 microsteps is determined by measuring the time interval of the previous step period and dividing it into 16 equal parts. the maximum time between two mi crosteps corresponds to 2 20 (roughly one million system clock cycles), for an even distribution of 256 microsteps. at 16 mhz system clock frequency, this results in a minimum step input frequency of 16 hz for microplyer operation (one fullstep per second). a lower step rate causes the stst bit to be set, which indicates a standstill event. at that frequency, microsteps occur at a rate of (system clock frequency)/2 16 ~ 256 hz. when a stand still is detected, the driver automatically switches the motor to hol ding current ihold . attention microplyer only works well with a stable step frequency. do not use the dedge option i f the step signal does not have a 50% duty cycle.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 84 www.trinamic.com f igure 16 . 2 microplyer microstep interpolation with rising step frequency in f igure 16 . 2 , the first step cycle is long enough to set the standstill bit stst . this bit is cleared on the next step active edge. then, the extern al step frequency increases . a fter one cycle at the higher rate microplyer adapts the interpolated microstep rate to the higher frequency. during the last cycle at the slower rate, microplyer did not generate all 16 microsteps, so there is a small jump in motor angle between the first and second cycles at the higher rate. s t e p i n t e r p o l a t e d m i c r o s t e p a c t i v e e d g e ( d e d g e = 0 ) a c t i v e e d g e ( d e d g e = 0 ) a c t i v e e d g e ( d e d g e = 0 ) 0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 3 2 a c t i v e e d g e ( d e d g e = 0 ) s t a n d s t i l l ( s t s t ) a c t i v e 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 m o t o r a n g l e 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 6 1 6 2 6 3 6 4 6 5 6 6 5 1 2 ^ 2 0 t c l k
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 85 www.trinamic.com 17 abn incremental encoder interface the tmc5 072 is equipped with two incremental encoder interfaces for abn encoders. the encoder inputs are multiplexed with other signals in order to keep the pin count of the device low. the basic selection of the peripheral configuration is set by the register gconf . the u se of the n channel is optional, as some applications might use a reference switch or stall detection rather than an encoder n channel f or position referencing. the encoders give positions via digital incremental quadrature signals (usually named a and b) and a clear signal (usually named n for null or z for zero). n s ignal the n signal can be used to clear the position counter or to tak e a snapshot. to continuously monitor the n channel and trigger clearing of the encoder position or latching of the position, where the n channel event has been detected, set the flag clr_cont . alternatively it is possible to react to the next encoder n ch annel event only, and automatically disable the clearing or latching of the encoder position after the first n signal event (flag clr_once ) . this might be desired because the encoder gives this signal once for each revolution. some encoders require a val idation of the n signal by a certain configuration of a and b polarity. this can be controlled by pol_a and pol_b flags in the encmode register. for example, when both pol_a and pol_b are set, an active n - event is only accepted during a high polarity of bo th, a and b channel. for clearing the encoder position enc_pos with the next active n event set clear_on_n = 1 and clr_once = 1 or clr_cont = 1. f igure 17 . 1 outline of abn signa ls of an incremental encoder t he e ncoder c onstant enc_const the encoder constant enc_const is added to or subtracted from the encoder counter on each polarity change of the quadrature signals ab of the incremental encoder. the encoder constant enc_const represents a signed fixed point number (16.16) to facilitate the generic adaption between motors and encoders. in decimal mode, the lower 16 bits represent a number between 0 and 9999. for stepper motors equipped with incremental encoders the fixed number representation allows very comfortable parameterization. additionally, mechanical gearing can easily be taken into account. negating the sign of enc_const allows inversion of the counting direction to match motor and encoder direction. example s : - encoder factor of 1 .0 : enc_const = 0x0001. 0x 0000 = factor.fraction - encoder factor of - 1 .0 : enc_const = 0xffff. 0x 0000. this is the twos complement of 0x00010000. it equals (2^16 - ( factor +1) ).(2^16 - fraction ) - decimal mode encoder factor 25.6: 00025.6000 = 0x0019.0x17 70 = factor.decimals - decimal mode encoder factor - 25.6: 0xffe6.4000 = 0xffe6.0x0fao. this equals (2^16 - (factor+1)).(10000 - decimals) a b t p o s i t i o n - 4 - 3 - 2 - 1 0 5 6 4 3 2 1 7 n
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 86 www.trinamic.com t he e ncoder c ounter x_enc the encoder counter x_enc holds the current encoder position ready for read out. different modes concerning handling of the signals a, b, and n take into account active low and active high signals found with different types of encoders. for more details please refer to the register mapping in section 6.3 . t he r egister enc _status the register enc_status holds the status concerning the event of an encoder clear upon an n channel signals. the register enc_latch stores the actual encoder position on an n signal event. 17.1 encoder timing the encoder inputs use analog and digital filtering to ensure reliable operation even with increased cable length. the maximum continuous counting rate is limited by input filtering to 2/3 of f clk . encoder interface timing ac - characteristics clock period is t clk parameter symbol conditions min typ max unit e ncoder counting frequency f cnt <2/3 f clk f clk a/b/n input low time t abnl 3 t clk +20 ns a/b/n input high time t abnh 3 t clk +20 ns a/b/n spike filtering time t filtabn r ising and falling edge 3 t clk 17.2 setting the encoder to match motor resolution encoder example settings for motor parameters: usc=256 steps, 200 fullstep motor factor = fsc*usc / encoder resolution e ncoder example setti ngs for a 200 fullstep motor with 256 microsteps encoder resolution r equired encoder factor c omment 200 256 360 142.2222 = 9320675.5555 / 2^16 = 1422222.2222 / 10 000 no exact match possible! 500 102.4 = 6710886.4 / 2^16 = 1024000 / 10000 e xact match with decimal setting 1000 51.2 e xact match with decimal setting 1024 50 4000 12.8 e xact match with decimal setting 4096 12.5 16384 3.125 example: the encode r constant register shall be programmed to 51.2 in decimal mode. therefore, set ??? _ ????? = 51 ? 2 16 + 0 . 2 ? 10000 17.3 closing the loop depending on the application, an encoder can be used for different purposes. medical applications often require an additional and independent monitoring to detect hard or soft failure. upon failure, t he machine can be stopped and restarted manually. less critical applications may use the encoder to detect failure, stop the motors upon step loss and restart automatically. a different use of the encoder
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 87 www.trinamic.com allows increased positioning precision by positioni ng directly to encoder positions. the application can modify target positions based on the deviation, or even regularly update the actual position with the encoder position. to realize a directly encoder based commutation, trinamic offers the new motion co ntroller tmc4361.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 8 8 www.trinamic.com 18 quick configuration guide this guide is meant as a practical tool to come to a first configuration and do a minimum set of measurements and decisions for tuning the driver. it does not cover all advanced functionalities, but concentrate s on the basic function set to make a motor run smoothly. once the motor runs, you may decide to explore additional features, e.g. freewheeling and further functionality in more detail. a current probe on one motor coil is a good aid to find the best setti ngs, but it is not a must. c urrent s etting and f irst s teps with stealth c hop figure 18 . 1 current setting and first steps with stealthchop c u r r e n t s e t t i n g c h o p c o n f s e t v s e n s e f o r m a x . 1 8 0 m v a t s e n s e r e s i s t o r ( 0 r 1 5 : 1 . 1 a p e a k ) s e t i _ r u n a s d e s i r e d u p t o 3 1 , i _ h o l d 7 0 % o f i _ r u n o r l o w e r l o w c u r r e n t r a n g e ? n y s e t i _ h o l d _ d e l a y t o 1 t o 1 5 f o r s m o o t h s t a n d s t i l l c u r r e n t d e c a y s e t t _ z e r o w a i t u p t o 6 5 5 3 5 f o r d e l a y e d s t a n d s t i l l c u r r e n t r e d u c t i o n c o n f i g u r e c h o p p e r t o t e s t c u r r e n t s e t t i n g s s t e a l t h c h o p c o n f i g u r a t i o n p w m c o n f s e t p w m _ a u t o s c a l e , s e t p w m _ g r a d = 1 , p w m _ a m p l = 2 5 5 p w m c o n f s e l e c t p w m _ f r e q w i t h r e g a r d t o f c l k f o r a b o u t 3 5 k h z p w m f r e q u e n c y m a k e s u r e t h a t m o t o r i s i n s t a n d s t i l l c h e c k h a r d w a r e s e t u p a n d m o t o r r m s c u r r e n t c h o p c o n f e n a b l e c h o p p e r u s i n g b a s i c c o n f i g . : t o f f = 4 , t b l = 2 , h s t a r t = 4 , h e n d = 0 m o v e t h e m o t o r b y s l o w l y a c c e l e r a t i n g f r o m 0 t o v m a x o p e r a t i o n v e l o c i t y i s p e r f o r m a n c e g o o d u p t o v m a x ? s e l e c t a v e l o c i t y t h r e s h o l d f o r s w i t c h i n g t o s p r e a d c y c l e c h o p p e r a n d s e t v c o o l t h r s n s c 2 y
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 89 www.trinamic.com t uning stealth c hop and spread c ycl e figure 18 . 2 tuning stealthchop and spreadcycle s c 2 t r y m o t i o n w i t h d e s i r e d a c c e l e r a t i o n a n d d e c e l e r a t i o n ( n o t e x c e e d i n g v c o o l t h r s ) p w m c o n f i n c r e a s e p w m _ g r a d ( m a x . 1 5 ) c o i l c u r r e n t o v e r s h o o t u p o n d e c e l e r a t i o n ? y m o v e s l o w l y , t r y d i f f e r e n t v e l o c i t i e s n m o t o r c u r r e n t s t a b l e ? p w m c o n f c h a n g e p w m _ f r e q o r s l i g h t l y d r e c r e a s e p w m _ g r a d n t r y m o t i o n a l s o a b o v e v c o o l t h r s , i f u s e d y c o i l c u r r e n t o v e r s h o o t u p o n d e c e l e r a t i o n ? p w m c o n f d e c r e a s e p w m _ a m p l ( d o n o t g o b e l o w a b o u t 5 0 ) y o p t i m i z e s p r e a d c y c l e c o n f i g u r a t i o n i f v c o o l t h r s u s e d n g o t o m o t o r s t a n d s t i l l a n d c h e c k m o t o r c u r r e n t s t a n d s t i l l c u r r e n t t o o h i g h ? n c h o p c o n f , p w m c o n f d e c r e a s e t b l o r p w m f r e q u e n c y a n d c h e c k i m p a c t o n m o t o r m o t i o n y p w m c o n f d i s a b l e s t e a l t h c h o p b y s e t t i n g p w m _ g r a d = 0 s p r e a d c y c l e c o n f i g u r a t i o n c h o p c o n f e n a b l e c h o p p e r u s i n g b a s i c c o n f i g . : t o f f = 5 , t b l = 2 , h s t a r t = 0 , h e n d = 0 m o v e t h e m o t o r b y s l o w l y a c c e l e r a t i n g f r o m 0 t o v m a x o p e r a t i o n v e l o c i t y m o n i t o r s i n e w a v e m o t o r c o i l c u r r e n t s w i t h c u r r e n t p r o b e a t l o w v e l o c i t y c h o p c o n f i n c r e a s e h e n d ( m a x . 1 5 ) c u r r e n t z e r o c r o s s i n g s m o o t h ? n m o v e m o t o r v e r y s l o w l y o r t r y a t s t a n d s t i l l c h o p c o n f s e t t o f f = 4 ( m i n . 3 ) , t r y l o w e r / h i g h e r t b l o r r e d u c e m o t o r c u r r e n t a u d i b l e c h o p p e r n o i s e ? y y m o v e m o t o r a t m e d i u m v e l o c i t y o r u p t o m a x . v e l o c i t y a u d i b l e c h o p p e r n o i s e ? c h o p c o n f d e c r e a s e h e n d a n d i n c r e a s e h s t a r t ( m a x . 7 ) y f i n i s h e d o r e n a b l e c o o l s t e p
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 90 www.trinamic.com m oving the m otor u sing the m otion c ontroller figure 18 . 3 moving the motor using the motion controller r a m p m o d e s e t v e l o c i t y _ p o s i t i v e s e t a m a x = 1 0 0 0 , s e t v m a x = 1 0 0 0 0 0 o r d i f f e r e n t v a l u e s m o t o r m o v e s , c h a n g e v m a x a s d e s i r e d m o v e m o t o r c o n f i g u r e r a m p p a r a m e t e r s r a m p m o d e s e t p o s i t i o n s t a r t v e l o c i t y s e t v s t a r t = 0 . h i g h e r v e l c o i t y f o r a b r u p t s t a r t ( l i m i t e d b y m o t o r ) . s t o p v e l o c i t y s e t v s t o p = 1 0 , b u t n o t b e l o w v s t a r t . h i g h e r v e l o c i t y f o r a b r u p t s t o p . c o n f i g u r e r a m p p a r a m e t e r s m o v e t o t a r g e t s e t x t a r g e t n e w o n - t h e - f l y t a r g e t ? y e v e n t _ p o s _ r e a c h e d a c t i v e ? n n y t a r g e t i s r e a c h e d c h a n g e o f a n y p a r a m e t e r d e s i r e d ? n s e t m o t i o n p a r a m e t e r a s d e s i r e d y s e t a c c e l e r a t i o n a 1 a s d e s i r e d b y a p p l i c a t i o n d e t e r m i n e v e l o c i t y , w h e r e m a x . m o t o r t o r q u e o r c u r r e n t s i n k s a p p r e c i a b l y , w r i t e t o v 1 a m a x : s e t l o w e r a c c e l e r a t i o n t h a n a 1 t o a l l o w m o t o r t o a c c e l e r a t e u p t o v m a x s e t d e s i r e d m a x i m u m v e l o c i t y t o v m a x d m a x : u s e s a m e v a l u e a s a m a x o r h i g h e r d 1 : u s e s a m e v a l u e a s a 1 o r h i g h e r s e t t z e r o c r o s s t o a l l o w m o t o r t o r e c o v e r f r o m j u m p v s t o p t o 0 , b e f o r e g o i n g t o v s t a r t i s v s t o p r e l e v a n t ( > > 1 0 ) ? n y r e a d y t o m o v e t o t a r g e t
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 91 www.trinamic.com e nabling cool s tep ( o nly in c ombination with spre ad c ycle ) figure 18 . 4 enabling coolstep (only in combination with spreadcyc le) e n a b l e c o o l s t e p m o v e t h e m o t o r b y s l o w l y a c c e l e r a t i n g f r o m 0 t o v m a x o p e r a t i o n v e l o c i t y d o e s s g _ r e s u l t g o d o w n t o 0 w i t h l o a d ? m o n i t o r s g _ r e s u l t v a l u e d u r i n g m e d i u m v e l o c i t y a n d c h e c k r e s p o n s e w i t h m e c h a n i c a l l o a d i s c o i l c u r r e n t s i n e - s h a p e d a t v m a x ? d e c r e a s e v m a x n y i n c r e a s e s g t y c o o l c o n f e n a b l e c o o l s t e p b a s i c c o n f i g . : s e m i n = 1 , a l l o t h e r 0 n s e t v h i g h f o r u p p e r c o o l s t e p v e l o c i t y l i m i t s e t v c o o l t h r s t o t h e l o w e r v e l o c i t y l i m i t f o r c o o l s t e p m o n i t o r c s _ a c t u a l d u r i n g m o t i o n i n v e l o c i t y r a n g e a n d c h e c k r e s p o n s e w i t h m e c h a n i c a l l o a d d o e s c s _ a c t u a l r e a c h i r u n w i t h l o a d b e f o r e m o t o r s t a l l ? i n c r e a s e s e m i n o r c h o o s e n a r r o w e r v e l o c i t y l i m i t s n c 2 c 2 m o n i t o r c s _ a c t u a l a n d m o t o r t o r q u e d u r i n g r a p i d m e c h a n i c a l l o a d i n c r e m e n t w i t h i n a p p l i c a t i o n l i m i t s d o e s c s _ a c t u a l r e a c h i r u n w i t h l o a d b e f o r e m o t o r s t a l l ? i n c r e a s e s e u p n f i n i s h e d
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 92 www.trinamic.com s etting up dc s tep figure 18 . 5 setting up dcstep e n a b l e d c s t e p d o e s t h e m o t o r r e a c h v m a x a n d h a v e g o o d t o r q u e ? s t a r t t h e m o t o r a t t h e t a r g e t e d v e l o c i t y v m a x a n d t r y t o a p p l y l o a d i n c r e a s e d c _ t i m e n y c h o p c o n f m a k e s u r e , t h a t t o f f i s n o t l e s s t h a n 3 . u s e l o w e s t g o o d t b l . s e t v h i g h f s a n d v h i g h c h m s e t v c o o l t h r s s l i g h t l y a b o v e v d c m i n f o r l o w e r s t a l l g u a r d v e l o c i t y l i m i t s e t v d c m i n t o a b o u t 5 % t o 2 0 % o f t h e d e s i r e d o p e r a t i o n v e l o c i t y d c c t r l s e t d c _ t i m e d e p e n d i n g o n t b l : % 0 0 : 1 7 ; % 0 1 : 2 5 % 1 0 : 3 7 ; % 1 1 : 5 5 d o e s t h e m o t o r r e a c h v d c m i n w i t h o u t s t e p l o s s ? r e s t a r t t h e m o t o r a n d t r y t o s l o w i t d o w n t o v d c m i n b y a p p l y i n g l o a d d e c r e a s e d c _ t i m e o r i n c r e a s e t o f f o r i n c r e a s e v d c m i n n y d c c t r l s e t d c _ s g t o 1 + 1 / 1 6 t h e v a l u e o f d c _ t i m e s w _ m o d e e n a b l e s g _ s t o p t o s t o p t h e m o t o r u p o n s t a l l d e t e c t i o n f i n i s h e d o r c o n f i g u r e d c s t e p s t a l l d e t e c t i o n c o n f i g u r e d c s t e p s t a l l d e t e c t i o n d o e s t h e m o t o r s t o p u p o n t h e f i r s t s t a l l ? s l o w d o w n t h e m o t o r t o v d c m i n b y a p p l y i n g l o a d . f u r t h e r i n c r e a s e l o a d t o s t a l l t h e m o t o r . i n c r e a s e d c _ s g n y r e a d o u t r a m p _ s t a t t o c l e a r e v e n t _ s t o p _ s g a n d r e s t a r t t h e m o t o r a c c e l e r a t e t h e m o t o r f r o m 0 t o v m a x d o e s t h e m o t o r s t o p d u r i n g a c c e l e r a t i o n ? i n c r e a s e v c o o l t h r s t o r a i s e t h e l o w e r v e l o c i t y f o r s t a l l g u a r d y n f i n i s h e d
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 93 www.trinamic.com 19 getting started please refer to the tmc5 07 2 evaluation board to allow a quick start with the device, and in order to allow interactive tuning of the device setup in your application. chapter 18 will guide you through the process of correctly setting up all registers. 19.1 initialization examples initialization spi datagram example sequence to enable driver 1 for step and direction operation and initialize the chopper for a 2 phase motor: spi send: 0xec00010 0c 5; // chopconf: toff=5, hstrt=4, hend= 1 , tbl=2, chm=0 (spreadcycle) spi send: 0xb0000 6 1f05; // ihold_irun: ihold=5, irun=31 (max. current ), ih olddelay=6 spi send: 0x ac 000 02710 ; // tzerowait=10000 spi send: 0x8000000006; // gconf=6: switch both drivers to step and direction operation spi datagram example sequence to enable and initialize driver 1 for spreadcycle operation combined with stealthch op at low velocities. r amp generator 1 move s the motor in velocity mode . additional read access to the position register : spi send: 0x8000000008; // gconf=8: enable pp and int outputs spi send: 0xec00010 0c 5; // chopconf: toff=5, hstrt=4, hend= 1 , tbl=2 , chm=0 (spreadcycle) spi send: 0xb000011f05; // ihold_irun: ihold=5, irun=31 (max. current), iholddelay=1 spi send: 0x90000401c8; // pwm_conf: auto=1, 2 /1024 fclk, switch amplitude limit=200, grad=1 spi send: 0xb200061a80; // vhigh=400 000: set vhigh t o a high value to allow stealthchop spi send: 0xb100007530; // vcoolthrs=30000: set upper limit for stealthchop to about 30rpm spi send: 0xa600001388; // amax=5000 spi send: 0xa700004e20; // vmax=20000 spi send: 0xa000000001; // rampmode=1 (positive v elocity) // now motor 1 should start rotating spi send: 0x2100000000; // query x actual C the next read access delivers x actual spi read; // read x actual initialization spi datagram example sequence to enable and initialize the motion controller and then move one rotation (51200 microsteps) using the ramp generator. spi send: 0xa4000003e8; // a1 = 1 000 first acceleration spi send: 0xa50000c350; // v1 = 50 000 acceleration threshold velocity v1 spi send: 0xa6000001f4; // amax = 500 acceleratio n above v1 spi send: 0xa7000304d0; // vmax = 200 000 spi send: 0xa8000002bc; // dmax = 700 deceleration above v1 spi send: 0xaa00000578; // d1 = 1400 deceleration below v1 spi send: 0xab0000000a; // vstop = 10 stop velocity (near to zero) spi send: 0x a00000000 0 ; // rampmode = 0 (target position move) // ready to move! spi send: 0xadffff3800; // xtarget = - 51200 (move one rotation left (200*256 microsteps) ) for uart based operation it is important to make sure that the crc byte is correct. the follo wing example shows initialization for a tmc5 07 2 with slave address 1 (nextaddr pin high) . it programs driver 1 to spreadcycle mode and ramp generator 1 to move the motor in velocity mode and read accesses the position and actual velocity registers: uart w rite: 0x05 0x01 0xec 0x00 0x01 0x00 0xc5 0xd3; // toff=5, hend=1, hstr=4, // tbl=2, mres=0, chm=0 uart write: 0x05 0x01 0xb0 0x00 0x01 0x14 0x05 0x 5 7; // ihold=5, irun=20, iholddelay=1 uart write: 0x05 0x01 0xa6 0x00 0x00 0x13 0x88 0xb4; // amax=5000
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 94 www.trinamic.com uart write: 0x05 0x01 0xa7 0x00 0x00 0x4e 0x20 0x85; // vmax=20000 uart write: 0x05 0x01 0xa0 0x00 0x00 0x00 0x01 0xa3; // rampmode=1 (positive velocity) // now motor 1 should start rotating uart write: 0x05 0x01 0x21 0x6b; // query xactual ua rt read 8 bytes; uart write: 0x05 0x01 0x22 0x25; // query vactual uart read 8 bytes; hint tune the configuration parameters for your motor and application for optimum performance.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 95 www.trinamic.com 20 external r eset the chip is loaded with default values during power on v ia its internal power - on reset. in order to reset the chip to power on defaults, any of the supply voltages monitored by internal reset circuitry (vsa, +5vout or vcc_io) must be cycled. vcc is not monitored. therefore vcc must not be switched off during op eration of the chip. as +5vout is the output of the internal voltage regulator, it cannot be cycled via an external source except by cycling vsa. it is easiest and safest to cycle vcc_io in order to completely reset the chip. also, current consumed from vc c_io is low and therefore it has simple driving requirements. due to the input protection diodes not allowing the digital inputs to rise above vcc_io level, all inputs must be driven low during this reset operation. when this is not possible, an input prot ection resistor may be used to limit current flowing into the related inputs. in case, vcc becomes supplied by an external source, make sure that vcc is at a stable value above the lower operation limit once the reset ends. this normally is satisfied whe n generating a 3.3v vcc_io from the +5v supply supplying the vcc pin, because it will then come up with a certain delay. 21 clock oscillator and clock input the clock is the tim ing reference for all functions: the chopper, the velocity , the acceleration cont rol, etc. many parameters are scaled with the clock frequency, thus a precise reference allows a more deterministic result. the on - chip clock oscillator provides timing in case no external clock is easily available. 21.1 using the internal clock directly tie the clk input to gnd near to the tmc5 07 2 if the internal clock oscillator is to be used. t he internal clock can be calibrated by driving the ramp generator at a certain velocity setting. reading out position values via the interface and comparing the resul ting velocity to the remote masters clock gives a time reference. a similar procedure also is described in 14.5 . this allows scaling acceleration and velocity settings as a result. the temperature dependency an d ageing of the internal clock is comparatively low. i mplementing f requency d ependent s caling frequency dependent scaling allows using the internal clock for a motion control application. the time reference of the external microcontroller is used to calcu late a scaler for all velocity settings. the following steps are required: 1. you may leave the motor driver disabled during the calibration. 2. start motor in velocity mode, with vmax =10000 and amax =60000 ( for quick acceleration). the acceleration phase is end ed after a few ms. 3. read out xactual twice, at time point t1 and time point t2, e.g. 100ms later (dt=0.1s). the time difference between both read accesses shall be exactly timed by the external microcontroller. 4. stop the motion ramp by setting vmax =0. 5. the nu mber of steps done in between of t1 and t2 now can be used to calculate the factor ? = ???? ? ?? ??????? ( ? 2 ) ? ??????? ( ? 1 ) = 1000 ??????? ( ? 2 ) ? ??????? ( ? 1 ) 6. now multiply each velocity value with this factor f, to normalize the velocity to steps per second. at a nominal value of the internal clock freque ncy, 780 steps will be done in 100ms. hint in case well defined velocity settings and precise motor chopper operation are desired, it is supposed to work with an external clock source. 21.2 using an external clock when an external clock is available, a freque ncy of 1 0 mhz to 16 mhz is recommended for optimum performance. the duty cycle of the clock signal is uncritical, as long as minimum high or low input time for the pin is satisfied (refer to electrical characteristics). up to 18 mhz can be used, when the
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 96 www.trinamic.com clock duty cycle is 50%. make sure, that the clock source supplies clean cmos output logic levels and steep slopes when using a high clock frequency. the external clock input is enabled with the first positive polarity seen on the clk input. attention switching of f the external clock frequency prevents the driver from operating normally. therefore be careful to switch off the motor drivers before switching off the clock (e.g. using the enable input), because otherwise the chopper would stop and the motor current le vel could rise uncontrolled. the short to gnd detection stays active even without clock, if enabled. 21.3 considerations on the frequency a higher frequency allows faster step rates, faster spi operation and higher chopper frequencies. on the other hand, it m ay cause more electromagnetic emission of the system and causes more power dissipation in the tmc5 07 2 digital core and voltage regulator. generally a frequency of 1 0 mhz to 16 mhz should be sufficient for most applications. for reduced requirements concerning the motor dynamics, a clock frequency of down to 8 mhz can be considered.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 97 www.trinamic.com 22 absolute maximum ratings the maximum ratings may not be exceeded under any circumstances. operat ing the circuit at or near more than one maximum rating at a time for extended periods shall be avoided by application design. parameter symbol min max unit supply voltage operating with inductive load (v vs v vsa ) v vs , v vs a - 0.5 2 7 v supply and bridge voltage max. *) v vs - 0.5 28 v vsa when different from to vs v vs a - 0.5 v vs +0.5 v i/o supply voltage v vio - 0.5 5.5 v digital vcc supply voltage (if not supplied by internal regulator) v vcc - 0.5 5.5 v logic input voltage v i - 0.5 v vio +0.5 v maximum curren t to / from digital pins and analog low voltage i/os i io +/ - 10 ma 5v regulator output current (internal plus external load) i 5vout 50 ma 5v regulator continuous power dissipation (v vm - 5v) * i 5vout p 5vout 1 w power bri dge repetitive output current i o x 2.0 a junction temperature t j - 50 150 c storage temperature t stg - 55 150 c esd - protection for interface pins (human body model, hbm) v esdap 4 (tbd.) kv esd - protection for handling (human body model, hbm) v esd 1 (tbd.) kv *) stray inductivity o f gnd and vs connections will lead to ringing of the supply voltage when driving an inductive load. this ringing results from the fast switching slopes of the driver outputs in combination with reverse recovery of the body diodes of the output driver mosfe ts. even small trace inductivities as well as stray inductivity of sense resistors can easily generate a few volts of ringing leading to temporary voltage overshoot. this should be considered when working near the maximum voltage. 23 electrical characterist ics 23.1 operational range parameter symbol min max unit junction temperature t j - 40 125 c supply voltage (using internal +5v regulator) v vs 5.5 26 v supply voltage (internal +5v regulator bridged: v vcc =v vsa ) v vs 4.7 5.4 v i/o supply voltage v vio 3.00 5.25 v vcc voltage when using optional external source (supplies digital logic and charge pump) v vcc 4. 6 5.25 v rms motor coil current per coil (value for design guideline) i rms 0.8 a peak output current per motor coil output (sine wave peak) i ox 1.1 a peak output current per motor coil output (sine wave peak) limit t j 105c , e.g. for 100ms short time acceleration phase below 50% duty cycle. i ox 1.5 a
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 98 www.trinamic.com 23.2 dc characteristics and timing characteristics dc characteristics contain the spread of values guaranteed within the specified supply voltage range unless otherwise s pecified. typical values represent the average value of all parts measured at +25c. temperature variation also causes stray to some values. a device with typical values will not leave min/max range within the full temperature range. power supply current dc - characteristics v vs = 24.0v parameter symbol conditions min typ max unit total supply current, driver disabled i vs + i vsa + i vcc i s f clk =16mhz 25 40 ma total supply current, operating, i vs + i vsa + i vcc i s f clk =16mhz, 40khz chopper 28 ma static s upply current i vs0 f clk =0hz 3 4.5 7 ma supply current, driver disabled, dependency on clk frequency i vs x f clk variable, additional to i vs0 1. 3 ma/mhz internal current consumption from 5v supply on vcc pin i vcc f clk =16mhz, 40khz chopper 25 40 ma io s upply current i vio no load on outputs, inputs at v io or gnd 15 30 a motor driver section dc - and timing - characteristics v vs = 24.0v parameter symbol conditions min typ max unit rds on lowside mosfet r onl measure at 100ma, 25c, static state 0.4 0.5 ? on highside mosfet r onh measure at 100ma, 25c, static state 0.5 0.6 ? slpon measured at 700ma load current 50 120 250 ns slope, mosfet turning off t slpoff measured at 700ma load current 50 220 450 ns current sourcing, d river off i oidle o xx pulled to gnd 120 180 250 a charge pump dc - characteristics parameter symbol conditions min typ max unit charge pump output voltage v vcp - v vs operating, typical f chop <40khz 4.0 v 5vout - 0.4 v 5vout v charge pump voltage threshold for undervoltage detection v vcp - v vs using internal 5v regulator voltage 3.1 3.6 3. 9 v charge pump frequency f cp 1/16 f clkosc linear regulator dc - characteristics parameter symbol conditions min typ max unit output voltage v 5vout i 5vout = 0ma t j = 25 c 4.75 5.0 5.25 v output resistance r 5vout static load 3 ? 5vout(dev) i 5vout = 30ma t j = full range 30 100 mv
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 99 www.trinamic.com clock oscillator and input timing - characteristics parameter symbol condition s min typ max unit clock oscillator frequency f clkosc t j = - 50c 9 12.4 mhz clock oscillator frequency f clkosc t j =50c 10.1 13.2 17.2 mhz clock oscillator frequency f clkosc t j =150c 13.4 18 mhz external clock frequency (operating) f clk 4 1 0 - 16 18 mhz external clock high / low level time t clk l / t clk h clk driven to 0.1 v vio / 0.9 v vio 10 n s external clock first cycle triggering switching to external clock source t clk 1 clk driven high 30 25 ns detector levels dc - characteristics parameter symbol conditions min typ max unit v vs a undervoltage threshold for reset v uv _vs a v vs rising 3.8 4.2 4.6 v v 5vout undervoltage threshold for reset v uv _5vout v 5vout rising 3.5 v v vcc_io undervoltage threshold for reset v uv_vio v vcc_io rising 1.9 2.55 3.0 v v vcc_io undervoltage detector hysteresis v uv_vio hyst 0.1 0.3 0.5 v short to gnd detector threshold (v vsp - v ox ) v os2g 1.5 2.2 3 v short to gnd detector delay (high side switch on to short detected) t s2g high side output clamped to v sp - 3v 0.8 1.3 2 s o vertemperature prewarning t otpw temperature rising 100 120 140 c overtemperature shutdown t ot temperature rising 135 150 170 c sense resistor voltage levels dc - characteristics parameter symbol conditions min typ max unit sense input peak threshold v oltage (low sensitivity) v srtl vsense =0 csactual =31 sin_x =248 hyst.=0; i brxy =0 32 0 mv sense input peak threshold voltage (high sensitivity) v srth vsense =1 csactual =31 sin_x =248 hyst.=0; i brxy =0 180 mv sense input tolerance / motor current full scale tolerance i coil vsense =0 - 5 +5 % internal resistance from pin brxy to internal sense comparator (additional to sense resistor) r brxy 20 m?
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 100 www.trinamic.com digital logic levels dc - characteristics parameter symbol conditions min typ max unit input voltage low lev el v inlo - 0.3 0.3 v vio v input voltage high level v inhi 0.7 v vio v vio +0.3 v input schmitt trigger hysteresis v inhyst 0.12 v vio v output voltage low level v outlo i outlo = 2ma 0.2 v output voltage high level v outhi i outhi = - 2ma v vio - 0.2 v in put leakage current i ileak - 10 10 a digital pin capacitance c 3.5 pf
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 101 www.trinamic.com 23.3 thermal characteristics the following table shall give an idea on the thermal resistance of the qfn - 48 package. the thermal resistance for a four layer board will provide a good idea on a typical application. the single layer board example is kind of a worst case condition, as the typical application will require a 4 layer board. actual thermal characteristics will depend on the pcb layout, pcb type and pcb size. a thermal resistance of 23c/w for a typical board means, that the package is capable of continuously dissipating 4w at an ambient temperature of 25c with the die temperature staying below 125c. parameter symbol conditions typ unit typical power dissipation o ne motor active, one motor in standby at lo w current p d one motor 1 .00 a rms 115 c (125 c) one motor 0 . 7 1 a rms 85 c (93c ) surface temperature at package center (peak surface temperature ) , board 55 mm x 85mm , 25c environment stealthchop or spreadcycle, s inewave, 40 or 20khz chopper, 24v , 16mhz , inte rnal supply for vcc motors: qsh4218 - 035 - 10 - 027 3. 7 2. 4 w w typical power dissipation two motors active p d two motors 0.71a rms 113c (119c) two motors 0.35a rms 64c (68c) 3. 7 1.4 w w thermal resistance junction to ambient on a single layer board r tj a single signal layer board (1s) as define d in jedec eia jesd51 - 3 (fr4, 76.2mm x 114.3mm , d=1.6mm ) 80 k/w thermal resistance junction to ambient on a multilayer board r tmja dual signal and two internal power plane board (2s2p) as defined in jedec eia jes d51 - 5 and jesd51 - 7 (fr4, 76.2mm x 114.3mm , d=1.6mm ) 23 k/w thermal resistance junction to ambient on a multilayer board with air flow r tmja 1 identical to r tmja , but with a ir flow 1m/s 20 k/w thermal resistance junction to board r tjb pcb temperature meas ured within 1mm distance to the package 10 k/w thermal resistance junction to case r tjc junction temperature to heat slug of package 3 k/w the thermal resistance in an actual layout can be tested by checking for the heat up caused by the standby power c onsumption of the chip. when no motor is attached, all power seen on the power supply is dissipated within the chip. note a spread - sheet for calculating tmc5 07 2 power dissipation is available on www.trinamic.com.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 102 www.trinamic.com 24 layout considerations 24.1 exposed die pad the tmc5 07 2 uses its die attach pad to dissipate heat from the drivers and the linear regulator to the board. for best electrical and thermal performance, use a reasonable amount of solid, thermally conducting vias between the die attach pad and the ground plane . the printed circuit board should have a solid ground plane spreading heat into the board and providing for a stable gnd reference. 24.2 wiring gnd all signals of the tmc5 07 2 are referenced to their respective gnd. directly connect all gnd pins under t he tmc5 07 2 to a common ground area (gnd, gndp, gnda and die attach pad). the gnd plane right below the die attach pad should be treated as a virtual star point. for thermal reasons, the pcb top layer shall be connected to a large pcb gnd plane spreading he at within the pcb. attention especially, the sense resistors are susceptible to gnd differences and gnd ripple voltage, as the microstep current steps make up for voltages down to 0.5 mv. no current other than the sense resistor current should flow on their connections to gnd and to the tmc5 07 2. optimally place them close to the tmc5 07 2, with one or more vias to the gnd plane for each sense resistor. the two sense resistors for one coi l should not share a common ground connection trace or vias, as also pcb traces have a certain resistance. 24.3 supply filtering the 5vout output voltage ceramic filtering capacitor (4.7 f recommended) should be placed as close as possible to the 5vout pin, w ith its gnd return going directly to the gnda pin. use as short and as thick connections as possible. for best microstepping performance and lowest chopper noise an additional filtering capacitor can be used for the vcc pin to gnd, to avoid charge pump and digital part ripple influencing motor current regulation. therefore place a ceramic filtering capacitor (470nf recommended) as close as possible (1 - 2mm distance) to the vcc pin with gnd return going to the ground plane. vcc can be coupled to 5vout using a 2.2 ? resistor in order to supply the digital logic from 5vout while keeping ripple away from this pin. a 100 nf filtering capacitor should be placed as close as possible to the vsa pin to ground p lane. the motor supply pins vs should be decoupled with a n electrolytic capacitor (47 f or larger is recommended) and a ceramic capacitor, placed close to the device. take into account that the switching motor coil outputs have a high dv/dt. t hus capacitive stray into high resistive signals can occur, if the motor traces are near other traces over longer distances. 24.4 single driver connection in a parallel connection setup, where the tmc5 07 2 drives one motor with double current, take into account, that driver 1 takes over the complete control. thus, the driver 1 layout should be optimized concerning sense resistor placement, etc. connect driver 2 bridge outputs and br pins in parallel to the corresponding driver 1 pins. especially for the br pins of driver 2, it is important to use low inductivity interconnection lines to driver 1.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 103 www.trinamic.com 24.5 layout e xample s chematic 1 - top l ayer (assembly side) 2 - inner l ayer (gnd) 3 - inner l ayer (supply vs) 4 - bottom l ayer c omponents f igure 24 . 1 layout example
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 104 www.trinamic.com 25 package mechanical data 25.1 dimensional drawing s attention: drawings not to scale. figure 25 . 1 dimensional drawings p arameter ref min nom max total thickness a 0.80 0.85 0.90 stand off a1 0.00 0.035 0.05 mold thic kness a2 - 0.65 0.67 lead frame thickness a3 0.203 lead width b 0.2 0.25 0.3 body size x d 7.0 body size y e 7.0 lead pitch e 0.5 exposed die pad size x j 5.2 5.3 5.4 exposed die pad size y k 5.2 5.3 5.4 lead length l 0.35 0.4 0.45 package edge tolerance aaa 0.1 mold flatness bbb 0.1 coplanarity ccc 0.08 lead offset ddd 0.1 exposed pad offset eee 0.1 25.2 package codes type package temperature range code & marking tmc5 07 2 - la qfn48 (rohs) - 40c ... +125c tmc5 07 2 - la
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 105 www.trinamic.com 26 design phi losophy we feel that this is one of the coolest chips which we did within the last years. the tmc50xx and tmc5130 family brings premium functionality, reliability and coherence previously reserved to costly motion control units. integration at street level cost was possible by squeezing know - how into a few mm2 of layout using one of the most modern smart power processes. the ic comprises all the knowledge gained from designing motion control ler and driver chips and complex motion control systems for more th an 20 years. we are often asked if our motion controllers contain software C they definitely do not. the reason is that sharing resources in software leads to complex timing constraints and can create interrelations between parts which should not be relate d. this makes debugging of software so difficult. therefore, the ic is completely designed as a hardware solution, i.e. each internal calculation uses a specially designed dedicated arithmetic unit. the basic philosophy is to integrate all real - time critic al functionality in hardware, and to leave additional starting points for highest flexibility . parts of the design go back to previous ics, starting from the tmc453 motion controller developed in 1997. our deep involvement , practical testing and the stable team ensure a high level of co nfidence and functional safety. bernhard dwersteg, cto and founder 27 disclaimer trinamic motion control gmbh & co. kg does not authorize or warrant any of its products for use in life support systems, without the specific wri tten consent of trinamic motion control gmbh & co. kg. life support systems are equipment intended to support or sustain life, and whose failure to perform, when properly used in accordance with instructions provided, can be reasonably expected to result i n personal injury or death. information given in this data sheet is believed to be accurate and reliable. however no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties which may r esult from its use. specifications are subject to change without notice. all trademarks used are property of their respective owners. 28 esd sensitive device the tmc5 07 2 is an esd sensitive cmos device sensitive to electrostatic discharge. take special ca re to use adequate grounding of personnel and machines in manual handling. after soldering the devices to the board, esd requirements are more relaxed. failure to do so can result in defect or decreased reliability.
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 106 www.trinamic.com 29 table of f igures figure 1.1 basic application and block diagram ................................ ................................ ................................ .......... 5 figure 1.2 energy efficiency with coolstep (example) ................................ ................................ ............................... 8 f igure 2.1 TMC5072 pin assignments. ................................ ................................ ................................ ............................. 9 figure 3.1 standard application circuit ................................ ................................ ................................ ......................... 12 figure 3.2 5v only operation ................................ ................................ ................................ ................................ ........... 13 figure 3.3 driving a single motor with high current ................................ ................................ ............................... 14 figure 3.4 using an external 5v supply for digital circuitry of driver (different opt ions) ............................. 15 figure 3.5 using an external 5v supply to bypass internal regulator ................................ ................................ 15 figure 3.6 rc - filter on vcc for reduced ripple ................................ ................................ ................................ .......... 16 figure 3.7 simple esd enhancement and more elaborate motor output protection ................................ .... 17 figure 4.1 spi timing ................................ ................................ ................................ ................................ ......................... 20 figure 5.1 addressing multiple TMC5072 via single wire interface using chaining ................................ ....... 24 figure 5.2 addressing multiple TMC5072 via differential interface, additional filtering for nextaddr ... 25 figure 5.3 ring mode example ................................ ................................ ................................ ................................ ....... 26 figure 8.1 motor coil sine wave current with stealthchop (measured with current probe) ....................... 49 figure 8.2 scope shot: good setting for pwm_grad ................................ ................................ ............................... 50 figure 8.3 scope shot: too small setting for pwm_grad ................................ ................................ ...................... 50 figure 8.4 good and too small setting for pwm_grad ................................ ................................ .......................... 51 figure 9.1 chopper phases ................................ ................................ ................................ ................................ .............. 57 figure 9.2 no ledges in current wave with sufficient hysteresis (magenta: current a, yellow & blue: sense resis tor voltages a and b) ................................ ................................ ................................ ................................ ... 59 figure 9.3 spreadcycle chopper scheme showing coil current during a chopper cycle ............................... 60 figure 9.4 classic const. off time chopper with offset showing coil current ................................ ................... 61 figure 9.5 zero crossing with classic chopper and correction using sine wave offset ................................ . 61 figure 11.1 ramp generator velocity trace showing consequent move in negative direction ................... 65 figure 11.2 illustration of optimized motor torque usage with TMC5072 ramp generator ......................... 66 figure 11.3 ramp generator velocity dependent motor control ................................ ................................ .......... 67 figure 11.4 using reference switche s (example) ................................ ................................ ................................ ....... 68 figure 12.1 function principle of stallguard2 ................................ ................................ ................................ ............ 70 figure 12.2 example: optimum sgt setting and stallguard2 reading with an example motor ................. 72 figure 13.1 coolstep adapts motor current to the load ................................ ................................ ......................... 75 figure 14.1 dcstep extended application operation area ................................ ................................ ....................... 77 figure 14.2 velocity profile with impact by overload situation ................................ ................................ ........... 78 figure 15.1 lut programming example ................................ ................................ ................................ ....................... 80 figure 16.1 step and dir timing, input pin filter ................................ ................................ ................................ .... 82 fig ure 16.2 microplyer microstep interpolation with rising step frequency ................................ .................... 84 figure 17.1 outline of abn signals of an incremental en coder ................................ ................................ ........... 85 figure 18.1 current setting and first steps with stealthchop ................................ ................................ ............... 88 figure 18.2 tuning stealthchop and spreadcycle ................................ ................................ ................................ ..... 89 figure 18.3 moving the motor using the motion controller ................................ ................................ ................. 90 figure 18.4 enabling coolstep (only in combination with spreadcycle) ................................ ............................ 91 figure 18.5 setting up dcstep ................................ ................................ ................................ ................................ ......... 92 figure 24.1 layout example ................................ ................................ ................................ ................................ ........... 103 figure 25.1 dimensional drawings ................................ ................................ ................................ .............................. 104
TMC5072 datasheet (rev. 1.21 / 201 6 - apr - 22 ) 107 www.trinamic.com 30 re vision history version date author bd C bernhard dwersteg sd C sonja dwersteg description 1.00 2012 - ju l - 20 sd new d esign (based on v2 silicon) 1.10 2013 - dec - 01 bd revision for v3 silicon - 8 bit addressing for uart , ring option - no three phase option - single sinewave table for both motors : changed table for motor driver register (common microstep table) - additional stealthchop option for 2 phase chopper - blanking of stallguard - dccoolstep - uart ring option: io3 as config input, address=0 selects no forwarding - sense resistor table 2014 - aug - 26 bd silicon v3.0a 1.12 2014 - oct - 15 bd - second stallguard tuning algorithm - no 3 phase chopper - adapted hint for optimum chopper frequency - added parts from rhino documentation v0.47 1.18 201 5 - feb - 24 bd stallguard stop details: improved homing algorithm in 14.4, added 1 2 .4, text for event_stop_sg, improved 19. 1 , limits vcc_io uv, vcp uv , detail wording in many chapters , 320mv vsrtl , spi example , added chapter closing the loop. added uart interface errata. explanation vactual sign , improve d blue blocks , dcstep description & proc edure 1.19 2015 - mar - 25 bd removed preliminary, slight corrections in wording 1.20 2015 - oct - 13 bd correct spi write access example, spi mode 3, added tclk1 data, corrected toff calc ulation example, comments in gstat, comment on spi_status, 5v only + - 5% , x1=128 in microstep table defaults 1.21 2016 - apr - 22 bd more details on: setting negative encoder factors, stealthchop lower current limit , ramp generator joystick control, terminate ramp , adaptation to internal fclk , interrupt handling corrected: effective stealthchop pwm frequency is 2* divider setting , wording v1 and vmax register , esd schematic w. varistors instead of snubber t able 30 . 1 documentation revisions 31 references [tmc5 07 2 - eval] tmc5 07 2 - eval ma nual [an001] trinamic application note 001 - parameterization of spreadcycle?, www.trinamic.com [an002] trinamic application note 002 - parameterization of stallguard2? & coolstep?, www.trinamic.com [an0 03 ] trinamic application note 0 03 - dcstep? with tmc5 07 2, www.trinamic.com calculation sheet tmc50 xx _calculations.xlsx

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